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[ROCm][DSv4.1][Perf] Run the delayed mHC seams through aiter's fused Triton kernel - #58655
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we need an UT for this new kernel. |
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…on kernel Signed-off-by: Ahmed <Muhammad.Ahmed@amd.com>
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Reviewed by @Fangzhou-Ai
vllm/vllm-openai-rocm:nightly-rocm100-36768d1bfd39094681cdbc8cb37d4b31c0729c89 is the first published ROCm nightly build whose underlying vLLM commit (36768d1bfd39094681cdbc8cb37d4b31c0729c89) includes all three PRs this recipe was waiting on: vllm-project/vllm#58655, #53492 and #58208. Signed-off-by: Fangzhou Ai <31551580+Fangzhou-Ai@users.noreply.github.com> Co-authored-by: Cursor <cursoragent@cursor.com>
3 participants
Purpose
On ROCm's DeepSeek-V4.1's path each mHC seam runs today as a chain of separate aiter kernels, with the RMSNorm as one more standalone pass over the collapse. Aiter ships a fused kernel for the whole seam now ROCm/aiter#5824, a split-K main kernel (post-mix, bf16 residual write, gate projection, square sums) plus a per-token reduce (gates including the Sinkhorn loop, RMSNorm applied in place to the collapse): two launches per seam. This PR wires vLLM to it on gfx950.
Test Plan
image used:
vllm/vllm-openai-rocm:nightly-rocm100serve command:
bench command:
vllm bench serve \ --model="$MODEL_PATH" \ --backend=vllm \ --tokenizer="$MODEL_PATH" \ --dataset-name=random \ --random-input-len=32768 \ --random-output-len=32 \ --random-range-ratio 0 \ --num-prompts=64 \ --max-concurrency=32 \ --ignore-eos \ --temperature=0 \ --save-result --result-dir . \ --metric-percentiles="50,90,99" \ --percentile-metrics="ttft,tpot,itl,e2el" 2>&1 | tee -a "$LOG_FILE"vllm bench serve \ --model="$MODEL_PATH" \ --backend=vllm \ --tokenizer="$MODEL_PATH" \ --dataset-name=random \ --random-input-len=350000 \ --random-output-len=350 \ --random-range-ratio 0 \ --num-prompts=128 \ --max-concurrency=32 \ --ignore-eos \ --temperature=0 \ --save-result --result-dir . \ --metric-percentiles="50,90,99" \ --percentile-metrics="ttft,tpot,itl,e2el" 2>&1 | tee -a "$LOG_FILE"lm-eval command:
Test Result
For ISL 32k/OSL 32/CONC 32 throughput improves by about 4.7%
For ISL 350k/OSL 350/CONC 32 throughput improves by about 2.94%
lmeval seems to be within range
Essential Elements of an Effective PR Description Checklist
supported_models.mdandexamplesfor a new model.