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Propagate the router-logit row stride through the native top-k kernels and use the stride-aware unfused path for padded rows. Add regression coverage for softmax and sigmoid routing with padded power-of-two and non-power-of-two expert counts. Assisted-by: OpenAI Signed-off-by: Id545 <idder.ghanbaja@gmail.com>
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This pull request has merge conflicts that must be resolved before it can be |
…ow-stride Signed-off-by: Id545 <idder.ghanbaja@gmail.com>
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This pull request has merge conflicts that must be resolved before it can be |
…moe-topk-padded-row-stride Signed-off-by: Id545 <idder.ghanbaja@gmail.com> # Conflicts: # csrc/moe/topk_softmax_kernels.cu
| { | ||
| STD_TORCH_CHECK(gating_output.dim() == 2, | ||
| "gating_output must be a 2D tensor"); | ||
| STD_TORCH_CHECK(gating_output.stride(1) == 1, |
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This assert might reject edge case tensors, e.g. (M, 1). It could be updated to num_experts == 1 || gating_output.stride(1) == 1.
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Thanks, good catch. Both topk_softmax and topk_sigmoid now check num_experts == 1 || gating_output.stride(1) == 1 (a1b3997).
| { | ||
| STD_TORCH_CHECK(gating_output.dim() == 2, | ||
| "gating_output must be a 2D tensor"); | ||
| STD_TORCH_CHECK(gating_output.stride(1) == 1, |
bnellnm
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LGTM except for a minor suggestion about the assertions.
A (M, 1) gating output has a contiguous last dimension whatever its stride(1) reports, so the check now only requires stride(1) == 1 when there is more than one expert, as suggested in review. Signed-off-by: Id545 <idder.ghanbaja@gmail.com>
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✅ @Id545, CI is now available for this PR.
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/ci run |
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✅ Triggered Buildkite CI #100455 for commit ℹ️ This PR is 1343 commits behind upstream |
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/ci retry |
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✅ Queued 1 failed job(s) for retry in Buildkite CI #100455. |
Purpose
Fixes #56900.
Inductor can produce router logits with padded physical rows, for example shape
[M, 60]and stride(64, 1). The native MoE top-k path usedblockIdx.x * num_expertsto locate each input row, so it read the wrong logitswhenever the physical row stride differed from
num_experts. This silentlychanged expert routing under compilation.
This change:
gating_output.stride(0)to the native top-k launcher;logical/physical row widths.
The input-row offset is
int64_tbecause PyTorch tensor strides are 64-bit;this also avoids 32-bit wraparound in the input address calculation. Open PR
#53131 independently widens
packed-row pointer arithmetic more broadly, but it does not propagate
stride(0)or handle padded rows. The two changes overlap only on theinput-offset width; this PR addresses the separate functional stride bug.
No open PR referencing #56900 or implementing padded-row support for this
kernel was found before submission.
Test Plan
The same focused cases were also run with a standalone kernel reproducer before
and after rebuilding vLLM from source. The end-to-end command uses the
issue reproducer.
Each end-to-end arm ran in a fresh process with separate vLLM, Inductor, and
Triton cache roots.
Test Result
The end-to-end control used
Qwen/Qwen1.5-MoE-A2.7B-Chatat revisionec052fda178e241c7c443468d2fa1db6618996bewith the 16-prompt duplicatebatch from #56900. The compiled and eager arms held the model runner and
selected backends fixed; only compilation mode changed.
Validation environment:
nvcc13.0.88), driver 580.126.09TORCH_CUDA_ARCH_LIST=9.00748d3bd57cb5c4303e58c8465e21f069629480dPre-commit passed on both changed files. The validated source files are
unchanged between the tested commit and the current PR base.
AI assistance
AI assistance was used for root-cause analysis, implementation drafting, and
validation planning. I reviewed every changed line and ran the tests and model
evaluation reported above.