[kunkunblueberry]

Summary

This PR adds a correctness-first CPU execution path for GLM-5.3-Flash / GLM5Next KDA for #57346.

The path is deliberately feature-local:

GLM5Next common KDA layer
  -> CPU platform dispatch
  -> CPU state helpers and causal convolution
  -> CPU KDA recurrence/chunk contract
  -> optional _C_AVX512 recurrent operator

It does not implement #57345 (CPU sparse MLA / KeyPool), Kimi K3 support, a generic GDN refactor, or a new GLM CPU model hierarchy. The two GLM5Next CPU PRs are intentionally separate so that KDA and sparse MLA can be reviewed and tested independently.

Self-review / Implementation notes

Scope and design

The initial source audit showed that CPU support required more than changing the two KDA imports. The common layer also reaches causal-convolution and state gather/scatter boundaries that have GPU-oriented implementations. I therefore kept the change at the GLM5Next KDA execution boundary and preserved the existing common projection, metadata, and routing code.

I did not add glm5next/cpu/model.py or a new backend registry. The hardware-specific difference is limited to KDA execution, so a model-level fork would add review and maintenance cost without solving a concrete blocker.

The related CPU GDN implementation was used as a reference for stateful CPU integration, but it was not treated as a drop-in KDA implementation. KDA differs in safe-gate semantics, beta handling, V-major state layout, and speculative state routing.

KDA semantics preserved

The CPU backend keeps the existing GLM KDA contract:

• q/k normalization and query scaling;
• bounded safe gate using per-head A_log and per-head/key-dimension g_bias;
• V-major recurrent state [slots, heads, V, K];
• separate chunk-prefill and recurrent-decode state semantics;
• chunk beta timing versus recurrent sigmoid-beta handling;
• 1-D ordinary decode slots and 2-D speculative accepted-token slots;
• NULL-slot skipping and in-place state writeback.

chunk_kda_with_fused_gate currently evaluates each packed sequence as a token-wise recurrence. This is mathematically equivalent to the chunk state transition; chunk-level parallelization is an optimization and remains outside this correctness-first change.

Reuse and native boundary

Ordinary CPU convolution continues to use the existing CPU causal-convolution implementation. GLM5Next speculative decoding has an additional accepted-token rolling-window contract, so only that feature-specific wrapper is implemented here; generic causal-convolution APIs are unchanged.

The Python backend is the explicit fallback and semantic contract. When the supported dense-state conditions are met and torch.ops._C.glm5next_kda_recurrent is registered, the recurrent path can use the native AVX-512 operator. Unsupported configurations do not silently route to Triton or NVIDIA KDA.

Validation

The independent reference implementation remains in the test module and shares no backend helper code. The focused suite covers:

• recurrent output and final-state parity;
• FP32 and BF16 native parity;
• packed prefill and sequence isolation;
• shuffled state slots and NULL slots;
• prefill-to-decode state handoff;
• speculative recurrent routing and accepted-token offsets;
• CPU causal-convolution rebinding and speculative rolling state;
• production-shaped Glm5NextLinearAttention prefill, decode, and speculative paths.

With the real _C_AVX512 extension loaded on the CPU server, the previously validated result is:

27 passed, 14 warnings

The native parity checks recorded approximately 2.98e-7 FP32 output error, 5.96e-8 FP32 final-state error, 1.35e-3 BF16 output error, and 1.19e-7 BF16 final-state error. Targeted Ruff, Ruff format, Typos, SPDX, lazy-import, forbidden-import, torch.cuda, and C++ clang-format hooks pass on the final files; manual Python 3.12 mypy also passes.

The final detached verification worktree without the prebuilt CPU extension ran 23 tests, with two failures at the unregistered causal-convolution operator/native spy boundary. Those failures are environment/build limitations of that worktree, not a replacement for the extension-backed result above.

Deliberate non-goals and remaining boundary

This PR makes no performance claim. AMX, additional precision-specific vector kernels, chunk-level parallelization, NUMA/batch benchmarks, and FP16/FP8 kernel work are follow-ups. Full GLM-5.3-Flash checkpoint generation still depends on #57345 and a real checkpoint validation run.

Please review in particular the CPU boundary in common/kda.py, state-slot semantics, the native operator guard/fallback, and whether any existing common helper should be reused without broadening this PR.

Duplicate-work check

The issue and open-PR searches found no separate open implementation of #57346 or a GLM5Next CPU KDA backend. #57687 is the separate sparse MLA / KeyPool effort.

This is an AI-assisted contribution. The human submitter will review every changed line and defend the design and validation results.

Refs #57346

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[kunkunblueberry]

Native recurrent milestone for #57346:

• Added csrc/cpu/glm5next_kda.cpp with an AVX-512 FP32 recurrent KDA path for dense state, plus _C registration and AVX-512 CMake source registration.
• Kept the existing independent PyTorch recurrence as fallback/reference; Python API remains unchanged.
• Native dispatch is restricted to the proven dense-state/safe-gate contracts; unsupported state variants continue through the Python path.
• Server GCC 13 standalone extension parity passed for FP32 and BF16: output max error 2.98e-7 / 1.35e-3, state max error 5.96e-8 / 1.19e-7.
• Server native-fragment pytest: 21 passed (including the two native parity cases).
• Existing CPU KDA suite without native extension remains 19 passed, 2 skipped.
• Full vLLM editable extension build was attempted with GCC 13/CMake 4.4.3 and is currently blocked only by the external oneDNN Git clone in the server environment; the new source itself compiles and the temporary operator extension loads successfully.

This is the first native step; packed/speculative native state routing and chunk-specific native API remain follow-up work.

[kunkunblueberry]

Validation update: real _C_AVX512 build loaded torch.ops._C.glm5next_kda_recurrent; native parity/speculative suite passed 21 tests. CPU binding smoke reports CpuPlatform, device_type=cpu, dispatch_key=CPU, is_cpu=True, and both common KDA symbols resolve to vllm.models.glm5next.cpu.kda. A production-shaped Glm5NextLinearAttention._forward decode smoke invoked vllm.models.glm5next.cpu.kda.fused_recurrent_kda and produced finite output. Focused CPU backend suite passed 19 tests with 2 expected skips under the server's torchcodec shim. Local diff-check and clang-format checks passed.

[kunkunblueberry]

The branch history was rebuilt from current upstream/main into one signed-off feature commit (186716118a) to resolve the DCO failure from the original unsigned planning commit. The old local history is retained only as cpu-kda-glm5next-old/cpu-kda-glm5next-history; the fork branch was force-updated with --force-with-lease.

[kunkunblueberry]

Additional runtime fix: CPU layer construction now skips the CUDA-only Triton scatter warmup registration, which would otherwise fail before forward. The real _C_AVX512 focused suite remains green at 26 passed / 14 warnings after this change. Packed-prefill and prefill-to-decode layer tests exercise CPU causal convolution, CPU state helpers, native KDA, and cache handoff. CPU speculative model execution remains explicitly fail-closed because the existing CPU causal-conv primitive does not implement accepted-token rollback.

[claude]

Claude Code Review

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[kunkunblueberry]

Self-review / Implementation notes

This review explains the design decisions and validation boundary for this PR.

Scope and design

The initial audit showed that CPU support required more than changing the two KDA imports. The common layer also reaches causal-convolution and state gather/scatter boundaries that have GPU-oriented implementations. The change is therefore kept at the GLM5Next KDA execution boundary while preserving the existing projection, metadata, and routing code.

I intentionally did not add glm5next/cpu/model.py, a new backend registry, a generic GDN refactor, Kimi K3 support, or CPU sparse MLA / KeyPool work from #57345. The related CPU GDN implementation was used as a reference for stateful integration, but it is not a drop-in KDA implementation because gate semantics, beta handling, V-major state layout, and speculative routing differ.

Semantics preserved

The CPU backend preserves:

• q/k normalization and query scaling;
• bounded safe gating with per-head A_log and per-head/key-dimension g_bias;
• V-major recurrent state [slots, heads, V, K];
• separate chunk-prefill and recurrent-decode state semantics;
• chunk beta timing versus recurrent sigmoid-beta handling;
• ordinary 1-D and speculative 2-D state-slot routing;
• NULL-slot skipping and in-place state updates.

chunk_kda_with_fused_gate currently evaluates each packed sequence as a token-wise recurrence. This is mathematically equivalent to the chunk state transition; chunk-level parallelization is an optimization follow-up.

Reuse and native boundary

Ordinary CPU convolution reuses the existing CPU causal-convolution implementation. GLM5Next speculative decoding has an additional accepted-token rolling-window contract, so only that feature-specific wrapper is added here; generic causal-convolution APIs are unchanged.

The Python backend is the explicit semantic fallback. When the supported dense-state conditions are met and torch.ops._C.glm5next_kda_recurrent is registered, recurrent execution can use the native AVX-512 operator. Unsupported configurations do not silently route to Triton or NVIDIA KDA.

Validation

The independent reference implementation remains in the test module and shares no backend helper code. Coverage includes recurrent parity, FP32/BF16 native parity, packed prefill, sequence isolation, shuffled and NULL slots, prefill-to-decode handoff, speculative routing, CPU convolution rebinding, rolling convolution, and production-shaped Glm5NextLinearAttention paths.

With the real _C_AVX512 extension loaded on the CPU server:

27 passed, 14 warnings

Recorded native parity errors were approximately 2.98e-7 FP32 output, 5.96e-8 FP32 final state, 1.35e-3 BF16 output, and 1.19e-7 BF16 final state. Ruff, Ruff format, Typos, SPDX, lazy-import, forbidden-import, torch.cuda, clang-format, and manual Python 3.12 mypy checks pass on the final files.

Remaining boundary

This PR makes no performance claim. AMX, additional precision-specific kernels, chunk-level parallelization, NUMA/batch benchmarks, and FP16/FP8 kernels are follow-ups. Full GLM-5.3-Flash checkpoint generation still depends on #57345 and a real checkpoint validation run.

The parts I would particularly appreciate review on are the CPU boundary in common/kda.py, state-slot semantics, native operator guards/fallbacks, and whether an existing common helper should be reused without broadening this PR.

This is an AI-assisted contribution; the human submitter will review every changed line and defend the design and validation results.