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[ROCm][Perf] FP8 o-projection for DeepSeek-V4.1-Flash MLA on AMD MI355X - #57081
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Port the FP8 o-projection path from vllm-project#56344 to AMD MI355X (gfx950) using ROCm-compatible kernels: fused_inv_rope_fp8_quant (Triton) + batched_gemm_a8w8_mxscale (AITER CK). The checkpoint's wo_a weights are already float8_e4m3fn with MX block scales (weight_block_size=[32,32], scale_fmt=ue8m0) — used directly without re-quantisation. E2E agentx-mvp results on MI355X TP=4, C=8, 3600 s: - TTFT p50: 566 ms → 335 ms (−41 %, beats B200 target of 346 ms) - ITL p50: 5.2 ms → 4.69 ms (−10 %) - Output throughput: 94.44 → 92.9 tok/s/chip (within run variance) - 0 errors, 0 FP8 fallback warnings across 1193 profiling requests CUDA graph capture guard: batched_gemm_a8w8_mxscale segfaults during capture on gfx950; FP8 path is skipped when torch.cuda.is_current_stream_capturing(), falling back to BF16. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: nehaprakriya <neha.prakriya@cs.ucla.edu> Co-Authored-By: Claude <noreply@anthropic.com>
During model profiling (KV cache sizing), vLLM runs a dummy forward pass with max_num_batched_tokens (16384) which exceeds the cos_sin cache size (4096 positions). Without this guard the FP8 path crashes with a shape mismatch. Skip FP8 for oversized batches and fall back to BF16 — profiling results are unaffected since it only measures memory, not latency. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: nehaprakriya <neha.prakriya@cs.ucla.edu>
…used q/kv norm+quant Extends the FP8 o-projection for DeepSeek-V4.1-Flash MLA on AMD MI355X with two improvements over the initial port: 1. Load-time priming (prepare_wo_a_fp8): instead of falling back to BF16 during CUDA graph capture, prime the FP8 path at process_weights_after_loading time so it dispatches correctly inside CUDAGraphMode.FULL decode graphs. Proven via eval_woa_loadtime_prime.py: cold cache → DISPATCH:False at capture time (BF16 baked permanently); primed cache → DISPATCH:True at all M=1/6/192/4096. 2. Fused q/kv RMSNorm + MXFP8-quant producer (_rocm_q_kv_rmsnorm_mxfp8): one Triton kernel norms q and kv and emits q as MXFP8 with row-major E8M0 scales, eliminating the duplicate re-quantization of the same tensor by wq_b and indexer.wq_b on every decode step. Bitwise-identical to the unfused path. AgentX benchmark results on MI355X, C32, vLLM TP=4 (dsv41flash-agentx2 campaign): Baseline: 231.76 tok/s/chip, p90_interactivity 33.77 tok/s/user This PR: 248.03 tok/s/chip, p90_interactivity 36.97 tok/s/user Delta: +7.0% throughput, +9.5% p90 interactivity Co-Authored-By: Claude <noreply@anthropic.com>
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FP8 o-projection for DeepSeek-V4.1-Flash MLA on AMD MI355X
Ports the FP8 output-projection chain (
wo_a) from the CUDA path to ROCmon MI355X (gfx950). CUDA already runs
deep_gemm_fp8_o_proj; ROCm wasdequantizing the FP8 E4M3
wo_aweight to BF16 and runningtorch.einsumon every forward pass of all 40 layers.
What changes
vllm/models/deepseek_v4_1/amd/rocm.pyrocm_prepare_inv_rope_woa_fp8/prepare_wo_a_fp8: new load-time hookthat rearranges the checkpoint's 32×32 E8M0 block scales to the 128×128
layout expected by
batched_gemm_a8w8_mxscale, storing the result and apre-computed FP32 cos/sin cache on the layer.
DeepseekV41ROCMAiterMLAAttention.forward: FP8 fast path usingfused_inv_rope_fp8_quant(Triton) →batched_gemm_a8w8_mxscale(AITER CK), with fallback to the existing BF16 path when
torch.cuda.is_current_stream_capturing()and the cache is cold.Why load-time, not lazy:
Decode at this serving configuration dispatches
CUDAGraphMode.FULL. A coldcos/sin cache at CUDA-graph capture time permanently bakes the BF16 fallback
into every replay for the lifetime of the process. The preparation therefore
runs in
process_weights_after_loading; V4.1 reaches this hook twice (oncepre-quant-finalize), so the prime uses a sticky-retry/recompute guard.
Correctness
Scale rearrangement (32×32 → 128×128 E8M0) measures 164.7 dB against the
exact fp32 dequant — the same tensor. End-to-end SNR 31.4–31.6 dB equals
the producer-alone SNR at every M (1, 6, 192, 4096), confirming that all
precision loss is FP8 activation quantization — identical to what CUDA's
deep_gemm_fp8_o_projperforms, not introduced by the scale rearrangement.Output is bitwise-identical to the BF16 path within FP8 tolerance at every
measured shape.
Component-level speedup (MI355X gfx950, graph-captured, weakest-of-5)
wo_akernel: BF16 → FP8Speedup fades toward large M as expected for a weight-bandwidth-bound kernel.
End-to-end benchmark (MI355X, TP=4, C=32, agentic-coding scenario)
~5.8σ above the measured cross-run coefficient of variation (0.94%).
Note: developed with AI assistance (Claude). All changes reviewed and validated end-to-end by the submitter.
supported_models.mdandexamplesfor a new model.