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…tter Assisted-by: Codex Signed-off-by: Canlin <canlinguosdu@gmail.com>
Assisted-by: Codex Signed-off-by: Canlin <canlinguosdu@gmail.com>
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Purpose
Fuse DeepSeek-V4.1's MXFP8
wo_bGEMM and sequence-parallel reduce-scatter into one SM100 CuTe DSL kernel. Opt in withVLLM_DSV41_GEMM_RS=1on TP4 within one NVLink multicast domain; batches below 1,024 tokens retain the existing GEMM + RS path. The kernel preserves MXFP8 operands and block-32 scales, reduces BF16 partials with FP32 accumulation, and shares one workspace across layers. Activation quantization remains a separate kernel.Duplicate-work check: #56611 is closed and concerned shifted mHC overlap; #54151 implements Kimi-K3 AG-GEMM; #56751 optimizes tiny-M DSV4.1 projections. This change targets the large-M MXFP8 output projection and its RS, using Kimi's symmetric allocation/reduction helpers without invoking its BF16 GEMM. No matching open MXFP8 GEMM-RS PR was found.
Test Plan
Deploy
Executed independently on node17 and node30, four B200 GPUs per server, with TP4 + EP4 + MegaMoE + SP. Start fresh servers for
VLLM_DSV41_GEMM_RS=0and1, then swap baseline/candidate across nodes. Both arms use source/native build78eaaad2c7a7f8c7864d9c9c72772e3f9f2669d0(including merged Mega-mHC), PyTorch 2.13.0+cu130, FlashInfer 0.6.18.post1, and CUTLASS DSL 4.7.1. The dependency image isvllm/vllm-openai:nightly-dc36fcce902a63eab06c1b93a5c4a5ee178a0c56;/opt/dsv41-nativeoverlays native libraries and DeepGEMM from the exact source-commit wheel. Other FlashInfer versions have not been validated; this kernel currently imports private FlashInfer helpers.Benchmark
The commands below retain the measured flags; result paths are shortened. Startup/autotuning and eight warmup requests per case are excluded from timing.
Correctness and kernel benchmark (same Python/runtime environment):
Test Result
DeepSeek-V4.1-Flash, 4×B200/server, TP4/EP4/MegaMoE/SP, random 8192-input/1024-output tokens. One measured run per node/mode/concurrency: 128, 128, and 1,928 requests respectively. Aggregate throughput is total output tokens divided by total duration across both nodes; mean latencies are request-weighted.
C64 is inconsistent across nodes and does not establish a stable gain. These are single paired runs per node, not repeated-run confidence intervals. All 8,736 measured requests succeeded with exact 8192/1024 token lengths and zero KV preemptions. Routed experts use MegaMoE; main's shared-expert shape guard disables shared-expert fusion for this checkpoint in both arms.
The TP4 correctness test passed, covering independent dequantized FP32 references, nonuniform scales, odd-M padding, workspace reuse, changed-input CUDA graph replay, and output lifetime. The kernel benchmark passed on both nodes, including the model dispatch's small-M fallback. On node17, quantization + GEMM + RS latency at M=2048/4096/8192 decreased from 100.08/139.81/225.74 µs to 60.91/94.21/160.78 µs (39.1%/32.6%/28.8% reductions). Smaller shapes regressed in the native kernel and use the existing path below M=1024.
Model validation is limited to serving and generation smoke tests. Baseline and fused generated text differed; the long-prompt baseline also varied across runs. No task-level accuracy acceptance has been established. The feature remains off by default, and formal accuracy evaluation is pending.
All applicable staged-file pre-commit hooks passed, including Ruff, formatting, typos, mypy, SPDX, and device API checks. Submission cleanup only changes annotations, local naming, license attribution, and test/benchmark device APIs; the fusion algorithm and serving configuration are unchanged from the measured runs.
AI assistance: Codex implemented the change and ran validation. This draft is submitted for the human author's line-by-line review and independent test verification; those reviews are not claimed complete.