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[Bugfix][GLM-5.3-Flash] Keep batch x heads out of gridDim.z in the GLM-5.3-Flash fused recurrent KDA kernel - #56974
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… heads out of gridDim.z fused_recurrent_gated_delta_rule_fwd_kernel was launched with grid = (NK, NV, N * HV). CUDA caps gridDim.z at 65535; with GLM-5.3-Flash at TP=1 (every DP rank) the first CUDA-graph capture batch of 1024 times 64 KDA heads is 65536, so cuLaunchKernel fails with 'invalid argument' and the engine cannot start (DP4, DP4+EP, TP1 all crash at capture). Put N * HV in gridDim.x (limit 2^31-1) and swap the program_id mapping in the kernel. Same change mirrored in the AMD copy and the flash_linear_attention copies which share the pattern. Signed-off-by: NolenLiang <nliang@nvidia.com>
…than 65535 (sequence, head) programs Adds the crashing shape (1024 sequences x 64 heads, and 2048 x 48) to tests/models/glm5next/test_kda_recurrent.py with small head dims; the full batch must be bitwise identical to the same batch run in two halves. Signed-off-by: NolenLiang <nliang@nvidia.com>
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| grid = (NK, NV, N * HV) | ||
| # N * HV goes in gridDim.x: gridDim.z is capped at 65535 and batch x heads exceeds it | ||
| # (e.g. GLM-5.3-Flash at TP=1: 1024 x 64 = 65536 -> "invalid argument" at CUDA-graph capture). | ||
| grid = (N * HV, NV, NK) |
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Question: Do we see this error only for GLM-5.3-Flash or for all models using KDA?
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same question here, I have encoutered this issue with GLM-5.3-Flash, but did't try or see any other model with this issue
@NolenLiang
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We have reproduced the end-to-end failure only with GLM-5.3-Flash, in the DP configuration we tested (TP=1 per rank, default max_num_seqs 1024 on ≥160 GB GPUs, so the largest capture batch is 1024 × 64 heads = 65536). The underlying limit is not model-specific: every launch site changed here puts N * HV in gridDim.z, where N is the sequence count of that kernel call and HV the per-rank value-head count, and CUDA caps gridDim.z at 65535.
Direct kernel tests on the 2026-09-11 nightly (synthetic inputs, one GB200, wrappers called directly): the stock fused_sigmoid_gating_delta_rule_update, fused_recurrent_gated_delta_rule and fused_recurrent_kda wrappers each fail with Triton Error [CUDA]: invalid argument at 1024 × 64, 2048 × 32 and 2048 × 48 (sequences × heads) and pass at 512 × 64; with this PR's files all calls succeed and the full batch is bitwise identical to the same batch run as two halves. These are kernel-level tests, not end-to-end tests of other models.
Whether another model exposes the issue depends on which kernel its dispatch path reaches and on the sequence and head counts of those calls. From code reading only (not tested): the Qwen GDN layer sends uniform non-spec decode batches to fused_recurrent_gated_delta_rule_packed_decode, which already guards B * HV > 65535, and reaches the changed kernel for spec-decode batches on the Triton path, for the decode tokens of mixed prefill+decode steps, and for all decode when VLLM_ENABLE_FLA_PACKED_RECURRENT_DECODE=0; the Kimi-K3 / Kimi-Linear KDA copy under models/kimi_k3 is separate and not changed here — its recurrent kernel uses a 1-D grid, while its packed-decode kernel puts B * H in gridDim.y, which has the same 65535 limit. A direct call to that packed-decode kernel fails with the same invalid argument at 2048 × 32 and 1024 × 64 (gridDim.y = 65536) and passes at 1024 × 32, so it is the same class of limit; it is outside this PR and we have not hit it end to end. We have not verified any of this end to end for other models.
Happy to retitle the PR to say "shared KDA/GDN fused recurrent kernels" with GLM-5.3-Flash as the verified reproducer, if you prefer.
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One option is to do one of the following:
- Keep current changes but also validate the blast radius is small by testing this on another model like k3 and TP>1
- Narrow the change so it only affects glm-5.3-flash tp1 (or models with the same kernel shapes).
WDYT?
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Went with option 2. The PR is now limited to the NVIDIA GLM-5.3-Flash copy: vllm/models/glm5next/nvidia/ops/third_party/kda/{kernels.py,fused_recurrent.py} plus the regression test. The shared third_party/flash_linear_attention files are reverted (per @ZJY0516's comment), and I also took the AMD GLM copy out — not something the review asked for, but we have no AMD reproduction or hardware to validate it, and it is not needed for the failure we confirmed. Both are left for separate follow-up with their own validation; the kernel-level results from the earlier comment stand as the pointer for whoever picks that up.
Re-ran the kernel regression test on the 2026-09-11 nightly image (4× GB200) with only the two NVIDIA GLM kernel files copied over the installed package (the shared flash-linear-attention wrappers left as installed): stock 2 failed / 6 passed in tests/models/glm5next/test_kda_recurrent.py (the two new > 65535-program cases fail with Triton Error [CUDA]: invalid argument), with the two files 8 passed. The end-to-end numbers in the description (TP4 with the patch matching stock TP4 throughput, DP4+EP serving, gsm8k) are from before the narrowing and were not repeated; the NVIDIA GLM kernel files are the same in both versions. Scope note: this copy serves every GLM-5.3-Flash TP configuration, not only TP=1; the failure itself needs TP=1 per rank at the default capture sizes.
Done as an additional commit rather than a rewrite so the review history stays intact. PR title and description updated accordingly.
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I am happy to try this PR on AMD MI350 so we can keep the rocm code. Just LMK once it's re-added, thanks.
Or if you rather have this merged ASAP I can open an AMD version of the PR
| IS_SPEC_DECODING: tl.constexpr, | ||
| IS_KDA: tl.constexpr, | ||
| ): | ||
| i_k, i_v, i_nh = tl.program_id(0), tl.program_id(1), tl.program_id(2) |
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Could we don't change these unrelated files
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Reverted in the latest commit — the PR now only touches the GLM-5.3-Flash NVIDIA copy under models/glm5next/nvidia/ops and its test. Details in the thread above.
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@claude code review |
…-Flash KDA kernels Revert the launch-grid change in the shared flash-linear-attention copies (fused_recurrent.py, fused_sigmoid_gating.py, kda.py), as requested in review, and also in the AMD GLM copy, to keep this change to the path on which the crash was reproduced and verified (models/glm5next/nvidia/ops). The shared and AMD kernels keep their previous launch grid; their N * HV > 65535 case is left for separate follow-up with its own validation. Signed-off-by: NolenLiang <nliang@nvidia.com>
NolenLiang
changed the title
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✅ @NolenLiang, CI is now available for this PR.
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/ci run --allow-stale |
JaredforReal
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LGTM, left ROCm to be verified
Thanks~ @NolenLiang
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✅ Triggered Buildkite CI #91551 for commit |
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Hi @NolenLiang, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, |
Keep both the upstream prefill-checkpoint test and the large-grid regression when resolving the append/append conflict. Use torch.accelerator.synchronize() to satisfy the CUDA API check, and limit the large-grid regression to NVIDIA to match the scope of the kernel fix. The approved NVIDIA kernel code is unchanged. Co-authored-by: Codex <noreply@openai.com> Signed-off-by: NolenLiang <nliang@nvidia.com>
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pre-commit checks have passed. |
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/ci run --allow-stale |
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✅ Triggered Buildkite CI #92363 for commit
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CI selector (shadow): 13 test steps (44 jobs) instead of 34 (49 jobs)Shadow mode: this changes nothing about what CI runs. It shows what the evidence-based selector would pick for this PR, next to today's rules. How it works. Feedback welcome: reply here if it would skip a step this change needs, or runs something unrelated.
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AMD mirrors: would add (0)none 3 changed files · base |
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/ci run --allow-stale |
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✅ Triggered Buildkite CI #92850 for commit |
…rrent KDA On SM90, use BV=min(next_pow2(V),16) and num_stages=2 when N*HV<=32; larger grids keep num_stages=3 and num_warps stays 1. Refresh the reviewed change onto main, preserving the gridDim.x fix from vllm-project#56974, the ROCm layout checks, and all upstream regression tests. The SM90 tuning and bit-identity regression are unchanged from ca844ca. The original H20 results remain historical evidence; GPU tests and benchmarks have not been rerun after this refresh. Local pre-commit, syntax, LF, and static rebase-preservation checks pass. Co-authored-by: Kimi <noreply@moonshot.ai> Co-authored-by: Codex <noreply@openai.com> Signed-off-by: Cheng Rui <286040359@qq.com> Signed-off-by: <chengrui4@lenovo.com>
…rrent KDA On SM90, use BV=min(next_pow2(V),16) and num_stages=2 when N*HV<=32; larger grids keep num_stages=3 and num_warps stays 1. Refresh the reviewed change onto main, preserving the gridDim.x fix from vllm-project#56974, the ROCm layout checks, and all upstream regression tests. The SM90 tuning and bit-identity regression are unchanged from ca844ca. The original H20 results remain historical evidence; GPU tests and benchmarks have not been rerun after this refresh. Local pre-commit, syntax, LF, and static rebase-preservation checks pass. Co-authored-by: Kimi <noreply@moonshot.ai> Co-authored-by: Codex <noreply@openai.com> Signed-off-by: Cheng Rui <286040359@qq.com> Signed-off-by: <chengrui4@lenovo.com>
…M-5.3-Flash fused recurrent KDA kernel (vllm-project#56974) Signed-off-by: NolenLiang <nliang@nvidia.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> Co-authored-by: Codex <noreply@openai.com>
…rrent KDA On SM90, use BV=min(next_pow2(V),16) and num_stages=2 when N*HV<=32; larger grids keep num_stages=3 and num_warps stays 1. Refresh the reviewed change onto main, preserving the gridDim.x fix from vllm-project#56974, the ROCm layout checks, and all upstream regression tests. The SM90 tuning and bit-identity regression are unchanged from ca844ca. The original H20 results remain historical evidence; GPU tests and benchmarks have not been rerun after this refresh. Local pre-commit, syntax, LF, and static rebase-preservation checks pass. Co-authored-by: Kimi <noreply@moonshot.ai> Co-authored-by: Codex <noreply@openai.com> Signed-off-by: Cheng Rui <286040359@qq.com> Signed-off-by: <chengrui4@lenovo.com>
Purpose
Fix a start-up crash of GLM-5.3-Flash in data-parallel deployments (TP=1 per rank):
fused_recurrent_gated_delta_rule_fwd_kernelwas launched withgrid = (NK, NV, N * HV), and with 64 KDA value heads on one GPU the first CUDA-graph capture batch of 1024 sequences needs1024 * 64 = 65536programs — one over the CUDAgridDim.zlimit of 65535 — so the launch fails withTriton Error [CUDA]: invalid argumentand--data-parallel-size 4(with or without EP) cannot start. TP4 (16 heads per rank) is unaffected.The kernel now carries
N * HVingridDim.x(limit 2^31-1) with theprogram_idmapping swapped accordingly. Scope (narrowed in review): only the NVIDIA GLM-5.3-Flash copy undervllm/models/glm5next/nvidia/ops/third_party/kda/(kernels.py,fused_recurrent.py) and its test are changed. The samegrid = (NK, NV, N * HV)pattern exists in the AMD GLM copy and inthird_party/flash_linear_attention/ops/{fused_recurrent,fused_sigmoid_gating,kda}.py; those are intentionally left unchanged here (no AMD reproduction available; the shared kernels serve other models and need their own validation) and are candidates for separate follow-up. The packed-decode kernel in the same GLM file already guarded this case (split_batch_head_grid = B * HV > 65535). The narrowed change serves every GLM-5.3-Flash TP configuration; the failure itself needs TP=1 per rank (DP) at the default capture sizes.Fixes #56973
Why this is not duplicating an existing PR
Searched vllm-project/vllm open and closed PRs and issues (GitHub search, 2026-09-13 and 2026-09-15) for
fused_recurrent_kda,gridDim.z,65535,invalid argument+ GLM-5.3-Flash / KDA / DP: no report of this crash and no PR touching the launch grid offused_recurrent_gated_delta_rule_fwd_kernel; the only related guard is the existingsplit_batch_head_gridcheck in the packed-decode kernel of the same file.Test Plan
tests/models/glm5next/test_kda_recurrent.py(test_fused_recurrent_kda_more_than_65535_programs, parametrized 1024×64 and 2048×48 (sequence, head) programs with head dim 16): the full batch must be bitwise identical to the same batch run in two halves. It fails on the unpatched kernel with the Triton launch error and passes with this change.tests/models/glm5next/test_kda_recurrent.py(NVIDIA glm5nextfused_recurrent_kda). The flash-linear-attention and AMD copies are no longer touched by this PR.Test commands run and results
On 4× GB200 (SM100), 2026-09-11 nightly image, the changed kernel files mounted over the installed package (
/tmp/tholds a copy oftests/soimport vllmresolves to the installed package):test_kda_recurrent.pywith the new case: stock kernel — 2 failed (the two new parametrizations,Triton Error [CUDA]: invalid argument), 6 passed; patched kernel — 8 passed.num_accepted_tokensat T=4 and T=6): outputs and state updatestorch.equal; both deterministic run to run. On the crashing shape (1024 × 64) the patched output equals a reference assembled from two stock half-batches, bitwise.--data-parallel-size 4 --enable-expert-parallelstarts, captures its graphs and serves an 8k-in/1k-out sweep at concurrency 1–128; TP4 with the patch reproduces stock TP4 throughput (169.6 vs 169.1 tok/s at c=1, 1898.6 vs 1897.4 at c=32); gsm8k 5-shot greedy on the patched DP4+EP server 0.927 vs 0.934 for stock TP4 (paired exact McNemar p = 0.29 on the 57 discordant questions).grid = (NK, NV, N * HV)lines checked present by grep). Stock: 2 failed / 6 passed intests/models/glm5next/test_kda_recurrent.py(the two > 65535-program cases,Triton Error [CUDA]: invalid argument); with the two files: 8 passed.Model evaluation
gsm8k, lm-evaluation-harness 0.4.13, 5-shot, greedy, one prompt per request, all 1319 questions: patched DP4 + EP server 0.927 (1223 correct) vs stock TP4 0.934 (1232 correct); paired exact McNemar on the 57 discordant questions p = 0.29 (no detectable difference; the kernel outputs themselves are bitwise identical to stock where stock can run).
AI assistance
This change was developed with an AI assistant (Claude); the author reviewed every changed line and ran the tests and measurements above.