[Bugfix][SM120][MLA] Support NoPE sparse MLA (GLM-5.3-Flash) on the FlashInfer SM120 backend - #55277
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WalkthroughThe MLA cache kernel now supports NoPE rows and zeroes reserved padding. The SM120 sparse backend derives top-k capacity from the physical buffer width. A kernel test validates the NoPE cache output. ChangesMLA sparse path updates
Estimated code review effort: 2 (Simple) | ~10 minutes Merge Risk: ⚪ Minimal · up to This change enables NoPE sparse MLA cache rows and sizes sparse capacity from the physical top-k buffer. The cache layout and zeroed reserved bytes are covered by targeted testing, with no current merge-blocking risk identified. Suggested reviewers: 🚥 Pre-merge checks | ✅ 3 | ❌ 2❌ Failed checks (2 warnings)
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Full details: Linked Issues checkExplanation The PR supports the NoPE sparse backend, but
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In `@csrc/libtorch_stable/cache_kernels.cu`:
- Around line 545-546: Update the fp8_ds_mla gather logic around
cp_gather_and_upconvert_fp8_kv_cache so pe_dim == 0 does not copy or expose
stale cache bytes as k_pe in workspace[..., 512:576]. Add a NoPE-aware path that
leaves the tail ignored or safely initialized, and add a regression test using a
sentinel value to verify NoPE consumers cannot read stale tail data.
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csrc/libtorch_stable/cache_kernels.cuvllm/v1/attention/backends/mla/flashinfer_mla_sparse_sm120.py
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GLM-5.3-Flash sparse MLA layers are NoPE (qk_rope_head_dim=0): the packed fp8_ds_mla row keeps the fixed 656-byte layout, but there is no RoPE tail to write. Relax the host-side pe_dim check to accept 0 and have the RoPE warp zero the reserved 128 bytes instead of reading k_pe, so any consumer of the DS-shaped row (e.g. cp_gather_and_upconvert_fp8_kv_cache on the chunked-context path) sees exact zeros rather than stale memory; a zero rope lane is bit-exact NoPE for q_pe · k_pe. The latent/scale bytes are unchanged. Adds a sentinel-filled regression test. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Co-authored-by: Kimi Code <noreply@moonshot.cn>
GLM-5.3-Flash widens the top-k buffer past index_topk with a kpool tail (2048 -> 2176), so the physical page table no longer matches attn_metadata.topk_tokens and FlashInfer rejects the shape. Mirror the generic flashinfer_mla_sparse backend: derive sparse_mla_top_k/max_seq_len from the converted buffer width; the kernel bounds the active length by the -1 padding. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Co-authored-by: Kimi Code <noreply@moonshot.cn>
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…backends (#4947) ## Summary `trtllm_batch_decode_with_kv_cache_mla` rejects the native NoPE form (`kv_lora_rank=512`, `qk_rope_head_dim=0`) at API entry unless `sparse_mla_top_k_lens` is provided. That requirement belongs to the native no-rope trtllm-gen/cute-dsl kernels (#4108), which consume the per-token active top-k length. The SM120 sparse backend (`backend="sparse"`, the v32 / GLM53_NOPE families) bounds each row by its `-1` page-table entries and never reads `sparse_mla_top_k_lens` — so the entry-level check makes the SM120 GLM-5.3-Flash NoPE path uncallable. (#4842 hit the same wall and dropped the check wholesale; this PR keeps the guard where the consuming kernels are instead.) Move the requirement past backend resolution and apply it only when a non-`sparse` backend will run. The `sparse_mla_top_k_lens` shape/dtype validation for callers that do pass it is unchanged, as is the SM100 native-NoPE contract. ## Testing - vLLM `FLASHINFER_MLA_SPARSE_SM120` + GLM-5.3-Flash-NVFP4, TP4 on 4×RTX PRO 6000 (SM120): previously raised `Native qk_rope_head_dim=0 TRTLLM-GEN MLA requires sparse_mla_top_k_lens` during CUDA graph capture; with this change the server boots and serves (companion vLLM PR: vllm-project/vllm#55277). GSM8K strict-match 0.9325. - Existing trtllm-gen NoPE callers are unaffected: the requirement still fires for `trtllm-gen` / `cute-dsl` / `xqa` / unresolved `auto` on non-SM120 parts. Signed-off-by: Zihua Wu <zihuaw@nvidia.com> <!-- This is an auto-generated comment: release notes by coderabbit.ai --> ## Summary by CodeRabbit * **Bug Fixes** * Improved validation for sparse attention configurations with positive top-k values and per-token top-k lengths. * Updated backend-specific handling so SM120 uses per-token sequence lengths and rejects unsupported sparse top-k length settings. <!-- end of auto-generated comment: release notes by coderabbit.ai --> Signed-off-by: Zihua Wu <zihuaw@nvidia.com> Co-authored-by: Kimi Code <noreply@moonshot.cn>
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This pull request has merge conflicts that must be resolved before it can be |
Purpose
Make the
FLASHINFER_MLA_SPARSE_SM120backend usable for GLM-5.3-Flash (glm5_next, #53906), whose sparse MLA layers are NoPE (qk_rope_head_dim=0) with a kpool-widened top-k buffer. Two independent breakages are fixed:concat_and_cachefp8_ds_mla rejects NoPE rows. The packed fp8_ds_mla row layout is unchanged for NoPE models (512B latent + 16B tile scales + 128B reserved RoPE/padding = 656B), but the host check requiredpe_dim == 64and the kernel's RoPE warp assumed 64 tail elements. Relax the check tope_dim ∈ {64, 0}and have the RoPE warp zero the reserved bytes whenpe_dim == 0, so consumers of the DS-shaped row (e.g.cp_gather_and_upconvert_fp8_kv_cacheon the chunked-context path) read exact zeros rather than stale memory — a zero rope lane is bit-exact NoPE forq_pe · k_pe. The FlashInfer GLM53_NOPE kernels never read the tail either way. A sentinel-filled regression test covers the NoPE row layout.Sparse page-table sized by
topk_tokensinstead of the actual buffer width. GLM-5.3-Flash widens the top-k buffer pastindex_topkwith a kpool tail (2048 → 2176, rounded to a multiple of 128), sotopk_indices_physical.shape[1] != attn_metadata.topk_tokensand FlashInfer rejectsblock_tables (B, 1, 2176)againstsparse_mla_top_k=2048. Mirror the genericflashinfer_mla_sparsebackend: derivesparse_mla_top_k/max_seq_lenfrom the converted buffer width; the kernel treats it as page-table capacity and bounds the active length by the-1padding.No behavior change for DSv3.2/DSv4 (RoPE, kpool=1): the packed row write is identical when
pe_dim == 64, andshape[1] == topk_tokenswhen there is no kpool tail.Requires FlashInfer with GLM53_NOPE support plus the companion check-scoping fix flashinfer-ai/flashinfer#4947 — both ride the same post-flashinfer#4802 release boundary, so no additional wait.
Relation to #53969
#53969 made this model servable before the native GLM53_NOPE kernel existed, by zero-padding the rope lane on both the KV-write and query side and routing through the GLM_NSA kernel — its own comment notes the shim "can be removed if the kernels grow native pe_dim == 0 support". This PR is that native support: no padding writes, no wasted rope MMA (~11% of the QK dims), and the decode goes to the dedicated GLM53_NOPE kernels with per-H tuning. The effective-topk half is the same fix (credit to @hamiltongaianimd for surfacing the kpool width issue first); whichever PR lands second rebases.
Test Plan
--language-model-only),max_model_len=65536, FULL_AND_PIECEWISE cudagraphs.Test Result
Pass. Without these commits the same server crashes at startup (
pe_dim must be 64 for fp8_ds_mla) and then at capture (expects sparse block_tables shape (512, 1, 2048), got (512, 1, 2176)).Signed-off-by: Zihua Wu zihuaw@nvidia.com