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[Kernel][Qwen] Add Hopper LL-GEMM tuning table for Qwen4Exp - #54560

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ZJY0516 merged 5 commits into
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zigzagcai:newly-optimize-Qwen3.8-Flash-Next
Sep 1, 2026
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ZJY0516 merged 5 commits into
vllm-project:mainfrom
zigzagcai:newly-optimize-Qwen3.8-Flash-Next

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@zigzagcai

@zigzagcai zigzagcai commented Aug 31, 2026

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Purpose

Add an independently tuned Hopper (SM90) LL-GEMM table for Qwen4Exp / Qwen3.8-Flash-Next decode, using the existing shared CuTe DSL skinny-GEMM implementation.

Following review feedback, the earlier Hopper-only HyperConnection fusion has been removed. The final diff only:

  • adds explicit H200 plans for the model's TP=4 local projection shapes;
  • covers selected decode batch sizes from M={1,2,4,8,16} instead of reusing the SM103 table or restricting Hopper to M=1;
  • falls back to the standard linear implementation whenever a shape/M point did not show a repeatable H200 win; and
  • adds table-integrity and H200 correctness coverage for every selected plan.

Dispatch remains narrowly guarded to SM90, BF16, unquantized layers, packed row-major inputs, and exact table entries. SM103 behavior is unchanged, and unsupported shapes, M values, dtypes, layouts, quantization methods, and platforms retain the existing path.

H200 tuning methodology

Hardware: NVIDIA H200 SXM, BF16. Shapes are the actual local (N, K) weights in a TP=4 Qwen3.8-Flash-Next deployment.

I swept all ten projection candidates at every M in {1,2,4,8,16} (50 shape/M points). Depending on shape, each point searched 80-666 legal combinations of:

  • block size: 32,64,96,128,160,192,224,256;
  • outputs per CTA: 1,2,3,4,6,8;
  • vector width: 1,2,4,8;
  • K unroll: 1,2,4,8, plus the full tile count where legal; and
  • dynamic versus static K.

Finalists were measured with 21 paired hot CUDA-graph replays and 101 paired L2-flush replays. A plan was retained only when its median improvement over torch.nn.functional.linear was at least approximately 3% in both regimes. The retained plan was then remeasured independently. This produced 31 plans across nine shapes; the other 19 points use the standard linear fallback.

The table below reports the independent hot-replay speedup for retained plans. fallback means the point was swept but failed the dual hot/L2-flush qualification. In particular, HC-up (10240, 320) remains on the standard implementation for every tested M.

Local (N, K) M=1 M=2 M=4 M=8 M=16
(4096, 2560) 1.382x 1.199x fallback fallback fallback
(2560, 1536) 1.495x 1.288x 1.096x fallback fallback
(24, 2560) 2.117x 2.257x 2.274x 2.397x 1.809x
(3584, 2560) 1.376x 1.226x fallback fallback fallback
(640, 2560) 2.686x 2.219x 1.971x 1.465x fallback
(320, 2560) 2.285x 2.178x 2.062x 1.650x 1.254x
(62080, 2560) 1.165x 1.116x fallback fallback fallback
(336, 10240) 2.071x 1.850x 1.580x 1.172x fallback
(10240, 320) fallback fallback fallback fallback fallback
(320, 10240) 2.111x 1.865x 1.466x 1.164x fallback

All 31 independently validated points beat the standard linear path, with speedups from 1.096x to 2.686x and maximum absolute error no larger than 0.015625.

Test Plan

# Correctness, fallback, routing, and table-integrity tests on H200.
CUDA_VISIBLE_DEVICES=0 python -m pytest -q \
  tests/kernels/test_bf16_skinny_gemm.py

# Repository checks for the final two-file diff.
pre-commit run --files \
  vllm/models/qwen4_exp/nvidia/low_latency_gemm.py \
  tests/kernels/test_bf16_skinny_gemm.py

The serving A/B used the parent of this PR, e0d27040ddcc5ac31cf01c5b04a7d764ccba656d, as the baseline. Baseline and optimized servers used the same four H200 GPUs and arguments, with separate cold vLLM caches:

vllm serve <Qwen3.8-Flash-Next> \
  --served-model-name Qwen3.8-Flash-Next \
  --tensor-parallel-size 4 \
  --moe-backend triton \
  --gpu-memory-utilization 0.85 \
  --max-num-seqs 256 \
  --enable-prefix-caching \
  --no-enable-flashinfer-autotune \
  --language-model-only \
  --load-format fastsafetensors

Matched sequential decode workload: 2 warmups plus 24 measured requests, exactly 2048 input tokens and 512 output tokens per request, concurrency 1, temperature 0, ignore_eos, seed 401.

Test Result

End-to-end serving A/B

Both variants completed 24/24 requests.

Metric Baseline SM90 tuned table Delta
Output throughput 136.20 tok/s 155.47 tok/s +14.15%
Request throughput 0.2660 req/s 0.3037 req/s +14.15%
Median TPOT 6.279 ms 5.478 ms -12.75%
Mean TPOT 6.342 ms 5.521 ms -12.95%
P99 TPOT 7.388 ms 6.421 ms -13.09%
Median TTFT 447.87 ms 406.89 ms -9.15%

The primary claim is decode TPOT/throughput. TTFT was noisy in this sequential workload and is included for completeness rather than claimed as a robust improvement. On a per-request basis, 23 of 24 requests had lower TPOT with the tuned table; their mean speedup was 1.151x.

Correctness and repository checks

tests/kernels/test_bf16_skinny_gemm.py:
215 passed, 158 skipped, 14 warnings

pre-commit:
all hooks passed

The H200 test run executes every one of the 31 selected SM90 entries through the production Qwen4Exp dispatch and checks cosine similarity greater than 0.999 against torch.nn.functional.linear.

AI assistance disclosure: OpenAI Codex was used to implement, test, benchmark, and draft this change. The human submitter remains responsible for reviewing and validating the contribution.


Essential Elements of an Effective PR Description Checklist
  • The purpose of the PR.
  • The test plan and commands.
  • Before/after microbenchmark and end-to-end results.
  • No documentation update is required; this tunes an existing supported model path.

Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
Assisted-by: OpenAI Codex
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@mergify mergify Bot added the qwen Related to Qwen models label Aug 31, 2026
@gau-nernst

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Thank you for your contributions. I have some questions:

  1. Do you have microbenchmark results sweeping across values of M? I think the fused kernel might not perform well for large M
  2. Have you tried tuning LL-GEMM as well? https://github.com/vllm-project/vllm/blob/e0d27040ddcc5ac31cf01c5b04a7d764ccba656d/vllm/models/qwen4_exp/nvidia/low_latency_gemm.py. sm103 uses this for good decode perf, while keeping the HC code simple

Use the measured Qwen4Exp low-latency GEMM plans for M=1 on SM90 while retaining the standard linear fallback for larger batches.

Assisted-by: OpenAI Codex
Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
@zigzagcai zigzagcai changed the title [Kernel][Qwen] Fuse Qwen4Exp decode HyperConnection on Hopper [Kernel][Qwen] Optimize Qwen4Exp decode on Hopper Sep 1, 2026
@zigzagcai

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Thanks for the suggestions — I investigated both and pushed the follow-up in ce4f884951.

  1. I swept the full HC path at M={1,2,4,8,16,32,64,128,256} under CUDA graph replay. The fused route is selected only at M=1: 6.3074 us -> 5.2312 us (1.206x). Every M>1 point takes the original fallback and is bit-identical to the reference. For example, M=64 is 7.0793 vs 7.0109 us and M=256 is 10.9665 vs 10.9798 us; these small differences are measurement noise because both columns execute the same operations. I also added a unit test that requires every Hopper plan to contain only M=1.

  2. I tried LL-GEMM in two ways:

    • I measured all eight existing Qwen4Exp M=1 plans on H200. They beat cuBLAS by 1.05x-2.42x, so the follow-up enables those plans on SM90 while retaining the standard linear path for all larger M.
    • For the HC-up (N=10240,K=320) specifically, I swept block size 32/64, outputs-per-block 1/2/4/8, vector width 1/2, dynamic/static K, and applicable K-unroll values. The best LL-GEMM was 4.3626 us vs 4.1752 us for cuBLAS. At full-pipeline level it was 6.0973 us vs 6.0700 us for the original HC path (0.5% slower), whereas the cross-op fusion was 5.1144 us (1.187x faster). Therefore I intentionally left this one shape out of the Hopper LL-GEMM plan and kept the narrow M=1 HC fusion.

The same-source three-way TP=4 H200 serving ablation now gives median TPOT:

Variant Median TPOT
Baseline 6.2885 ms
HC fusion only 6.1513 ms (-2.18%)
HC fusion + SM90 LL-GEMM 5.3762 ms (-14.51%)

I updated the PR description with the complete M sweep, per-shape LL-GEMM table, tuning methodology, ablation, and tests. The combined path also completed the full 1,319-example GSM8K run at 74.98% accuracy.

@gau-nernst

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I'm not sure if we are willing to keep a custom kernel only for M=1 and for Hopper only. I would accept a PR adding an LL-GEMM tuning table for Hopper though (you should retune all shapes if possible).

Perhaps in the future we can have LL-GEMM supporting custom elementwise epilogue.

Keep the HyperConnection path on the standard linear implementation so Hopper decode optimization can use the shared LL-GEMM infrastructure instead of a model- and shape-specific fused kernel.\n\nAssisted-by: OpenAI Codex

Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
Retune all Qwen4Exp TP=4 skinny-GEMM shapes on H200 for M=1,2,4,8,16. Keep only plans that beat the standard linear path in both hot-cache and L2-flush measurements, and fall back for the remaining points.

Add table integrity checks and H200 correctness coverage for every selected plan.

Assisted-by: OpenAI Codex
Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
@zigzagcai

zigzagcai commented Sep 1, 2026

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I'm not sure if we are willing to keep a custom kernel only for M=1 and for Hopper only. I would accept a PR adding an LL-GEMM tuning table for Hopper though (you should retune all shapes if possible).

Perhaps in the future we can have LL-GEMM supporting custom elementwise epilogue.

I'm not sure if we are willing to keep a custom kernel only for M=1 and for Hopper only. I would accept a PR adding an LL-GEMM tuning table for Hopper though (you should retune all shapes if possible).

Perhaps in the future we can have LL-GEMM supporting custom elementwise epilogue.

@gau-nernst Thanks for the invaluable direction. I have reworked the PR accordingly.

  • I removed the Hopper-only custom HyperConnection fusion entirely. The final diff now only adds an SM90 tuning table using the existing shared LL-GEMM implementation, together with its tests.
  • I independently retuned all ten Qwen4Exp TP=4 projection candidates on H200 at M={1,2,4,8,16}, including both HC-related shapes. Each point swept 80–666 legal configurations across block size, outputs per CTA, vector width, K unroll, and dynamic/static K.
  • I retained a plan only when it beat the standard linear path by approximately 3% or more in both paired hot-cache and L2-flush measurements. This resulted in 31 entries across nine shapes. All other shape/M points fall back to the standard implementation; in particular, (N=10240, K=320) falls back for every tested M.
  • In an independent validation pass, all 31 retained entries beat the standard path by 1.096x–2.686x, with maximum absolute error no larger than 0.015625. The H200 correctness test executes every selected entry through the production Qwen4Exp dispatch.
    The matched TP=4 H200 serving A/B improved output throughput from 136.20 to 155.47 tok/s (+14.15%) and reduced median TPOT from 6.279 to 5.478 ms (-12.75%). The test suite reports 215 passed, 158 skipped, and all pre-commit hooks pass.

I also updated the PR description with the complete shape/M matrix, tuning methodology, fallback decisions, and benchmark results.

Could you please take another look, and accept this PR if possible (LL-GEMM tuning table for Hopper has been added)?
Thanks!

@zigzagcai
zigzagcai marked this pull request as ready for review September 1, 2026 07:36

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Can you update the PR title? Thank you

@gau-nernst

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/ci run

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github-actions Bot commented Sep 1, 2026

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✅ Triggered Buildkite CI #86533 for commit b447a4a77dd4.

@zigzagcai zigzagcai changed the title [Kernel][Qwen] Optimize Qwen4Exp decode on Hopper [Kernel][Qwen] Add Hopper LL-GEMM tuning table for Qwen4Exp Sep 1, 2026
@zigzagcai

zigzagcai commented Sep 1, 2026

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Can you update the PR title? Thank you

Thanks for the feedback! The PR title has been updated:

[Kernel][Qwen] Add Hopper LL-GEMM tuning table for Qwen4Exp

@gau-nernst

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/ci run

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✅ Triggered Buildkite CI #86548 for commit 27662585d9a8.

@zigzagcai

zigzagcai commented Sep 1, 2026

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Hi @gau-nernst , I see all CI checks passed.

Could this PR be merged?
Thanks!

@ZJY0516 ZJY0516 added the ready ONLY add when PR is ready to merge/full CI is needed label Sep 1, 2026
@ZJY0516
ZJY0516 enabled auto-merge (squash) September 1, 2026 11:12
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@zigzagcai, CI is now available for this PR.

  • /ci run starts upstream CI; /amd-ci run starts AMD CI only.
  • /ci retry retries failed jobs in the CI build for the current PR head. If the current head has no CI build, it starts a new CI build for the current head containing only jobs that failed in the latest earlier CI build for this PR.
  • /amd-ci retry retries failed jobs in AMD CI for the current PR head. Use /amd-ci run when the current head has no AMD CI build.
  • /ci cancel cancels scheduled or running CI builds for this PR branch; /amd-ci cancel does the same for AMD CI only.

@ZJY0516
ZJY0516 merged commit 191cecd into vllm-project:main Sep 1, 2026
70 of 71 checks passed
am-cohere pushed a commit to am-cohere/vllm that referenced this pull request Sep 1, 2026
…ject#54560)

Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
mylibrar pushed a commit to tanyuqian/vllm that referenced this pull request Sep 3, 2026
…ject#54560)

Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
sheralskumar pushed a commit to sheralskumar/vllm that referenced this pull request Sep 8, 2026
…ject#54560)

Signed-off-by: Zheng Cai <8370601+zigzagcai@users.noreply.github.com>
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