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The ROCm platform unconditionally downgrades cudagraph_mode to PIECEWISE
whenever decode context parallel (DCP) is enabled. This is broader than
necessary: the all-to-all ("a2a") DCP reduce path is built from Triton
pack/unpack kernels over private-pool torch.empty send/recv buffers that
are designed to be full-cudagraph capture-safe, and CUDA already runs this
path under full CUDA graphs (cuda.py has no such downgrade). Only the
ag_rs and PCP paths need the PIECEWISE fallback.
Gate the DCP downgrade on dcp_comm_backend != "a2a" so ROCm reaches full
CUDA graphs for the a2a backend, matching CUDA.
Measured on MI355x (gfx950), Kimi-K3 TP8/DCP8, a2a backend, fp8 KV,
random 8192-in/1024-out at concurrency 8: full CUDA graphs vs the
forced-PIECEWISE baseline improve output throughput 53 -> 191 tok/s (3.6x)
and mean TPOT 148 -> 40 ms (3.7x), 40/40 requests successful, generation
unchanged and coherent.
Assisted-by: Claude Opus 4.6 <noreply@anthropic.com>
Signed-off-by: seungrokj <seungrok.jung@amd.com>
![claude[bot]](https://avatars.githubusercontent.com/in/1236702?s=60&v=4){kind=small}
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Summary
The ROCm platform (
vllm/platforms/rocm.py) unconditionally downgradescudagraph_modetoPIECEWISEwhenever decode context parallel (DCP) isenabled. This is broader than necessary.
The all-to-all (
a2a) DCP reduce path(
vllm/v1/attention/ops/dcp.py::dcp_a2a_lse_reduce) is built from Triton(
@triton.jit) pack/unpack kernels over private-pooltorch.emptysend/recvbuffers that are explicitly designed to be full-cudagraph capture-safe (see the
comment in
_dcp_a2a_send_recv_buffers). CUDA already runs this exact pathunder full CUDA graphs —
cuda.pyhas no equivalent downgrade. Only theag_rsand prefill-context-parallel (PCP) paths need the PIECEWISE fallback onROCm.
This gates the DCP downgrade on
dcp_comm_backend != "a2a", bringing ROCm toparity with CUDA for the a2a backend. CUDA behavior is unchanged;
ag_rs(default) and PCP still downgrade to PIECEWISE.
Not a duplicate
Searched open PRs/issues for DCP + CUDA graph + ROCm (e.g. #48248 FlashInfer
A2A backend, #53001 Aiter non-causal draft, #46249 NCCL cudagraph eager-break).
None modify the ROCm DCP cudagraph-mode override.
Test plan / results
Hardware: AMD MI355x (gfx950), Kimi-K3, TP8/DCP8,
--dcp-comm-backend a2a(non-direct path,
VLLM_USE_DIRECT_DCP_A2A=0), TRITON_MLA, fp8 KV,--compilation-configcudagraph_mode=FULL_AND_PIECEWISE.Overriding cudagraph_mode to PIECEWISE; FULL cudagraphcaptures = 0.
Capturing CUDA graphs (FULL)),Graph capturing finished ~4 GiB/worker, no illegal memory access,engine healthy.
vllm bench serve(random, 8192-in / 1024-out, 40 prompts, max-concurrency 8):~3.6x throughput / 3.7x TPOT. Output is unchanged and coherent (spot-check:
"The capital of France is" -> " Paris."). TTFT is unchanged because prefill is
not cudagraph-captured.
Note: the "CUDA already runs this path under full graphs" statement is based on
cuda.pyhaving no DCP cudagraph downgrade; it was validated on ROCm hardware,not re-verified on NVIDIA.
AI assistance
This change was developed with AI assistance (Claude). The submitter has
reviewed every changed line and run the tests above.