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…sions Size shared CPU offload rows by local_world_size and assign worker slots by model-parallel rank. Preserve per-node, per-DP-replica capacity and reject unsupported launcher, PP/PCP, and remote secondary-tier topologies. Refresh on main while retaining upstream HiSparse group selection and tests. Generated with [Devin](https://devin.ai) Co-authored-by: Codex <codex@openai.com> Co-Authored-By: Devin <158243242+devin-ai-integration[bot]@users.noreply.github.com> Signed-off-by: Yuting Wu (DLAlgo) <yutwu@nvidia.com>
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Purpose
A shared CPU-offload mmap is node-local, but native offloading currently sizes its rows using the global worker count. TP8 across two nodes therefore reserves eight worker slots in each four-worker node's region, halving effective cache capacity at the same host-memory budget.
Size non-replicated rows using
local_world_size, and assign slots using model-parallel rank modulo that size. Physical CUDA ordinals are unsuitable: devices 0 and 2 would both map to slot 0 with two local workers. Replicated layouts retain a single copy.This change also validates the supported topology before allocation:
Secondary tiers mean storage beyond CPU memory, such as a filesystem or object store. This PR does not implement distributed secondary-tier transfers. It addresses the shared-region geometry discussed in #54415 and complements that separate protocol work.
Rebased onto
2a02f6efe319c885e3ccbcecde402e0028f9ec1e; that upstream revision still contains global sizing and physical-device slot assignment.Validation
mmap.PAGESIZE; the affected suite rerun had 57 passed. Counts overlap.git diff --checkpassed.Linux source test command:
Validation used a Python source overlay with the cached container's compiled extensions. Subsequent two-node GB300 validation used real Qwen3-0.6B weights: TP4 across both nodes on physical devices 0/2 passed 12/12 CPU-cache reloads, and DP4×TP2 (two replicas per node, one API) passed 48/48 reloads targeting all four DP ranks. Every replay restored 304 cached tokens and exactly matched its 32 cold-reference output token IDs. CPU-to-GPU bytes increased 418,381,824 per engine. Both nodes verified the changed source-file hashes against this PR commit. The initial final-metric parser expected a newer metric name; independent verification of the saved raw responses and compatibility counters passed.
DCP remains unqualified in this test stack. Qwen TP4/DCP2 is invalid because TP must exceed its eight KV heads. Earlier TinyLlama comparisons mixed sequential cold requests with concurrent replays, so they did not control batch size.
A new two-node GB300 rerun used pretrained TinyLlama TP8/DCP2, FlashInfer, BF16, eager execution, temperature 0, seed 42, client concurrency 1, and server
max_num_seqs=1throughout. Four prompts each had three 32-token replays. With a GPU-warm reference request before the reloads, both the normal and hash-instrumented cases matched 6/12 cold outputs and 9/12 GPU-warm outputs; all reloads restored 320 cached tokens. An initial C1 run without the extra warm request matched 0/12. With CPU offload and prefix caching both disabled, DCP2 matched 10/12 recomputed outputs; the otherwise equivalent DCP1 control matched 12/12. These are replay comparisons, not model accuracy qualification.The intrusive SHA-256 diagnostic audited every scheduled physical copy descriptor on all eight TP ranks across both nodes: 7,040 GPU-to-CPU store descriptors and 21,120 CPU-to-GPU load descriptors, zero mismatches. Every load matched its earlier GPU-before-store digest, CPU-before-load digest, and GPU-after-load digest; an independent validator reconstructed store history from the raw logs. Total audited load bytes were 86,507,520, consistent with the engine counter. This verifies the measured byte transfers, not logical-block selection or race freedom: the diagnostic synchronizes CUDA and can alter timing. No diagnostic instrumentation was added to the PR.
The DCP2 control demonstrates output differences without CPU offload, but does not root-cause them or establish an upstream DCP defect. The source overlay/cached compiled-extension combination remains a confound. No Kimi accuracy qualification was performed for this revised candidate. Earlier Kimi results reported in this PR's history apply to earlier code and are not presented as validation of this revision.
AI assistance
AI assistance was used to investigate, implement, review, and test this change. Human review remains required before merge.