[XPU] Use fused_input_norm kernel in FusedInputNorm - #52945
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jikunshang merged 5 commits intoSep 7, 2026
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On XPU, dispatch FusedInputNorm.forward to the fused_input_norm custom kernel (torch.ops._C.fused_input_norm) when the input is uint8 and the affine weight/bias are fp32. The eager path materializes an fp32 intermediate and casts back, adding device-side compute that cancels the bandwidth saving of transferring uint8 pixel_values on XPU. The fused kernel reads uint8 directly and writes the visual dtype in a single pass, and is numerically identical to the broadcasted multiply-add fallback that is kept for all other cases. Requires the fused_input_norm op from vllm-xpu-kernels. Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
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jikunshang
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Aug 28, 2026
| dtype=visual_dtype, | ||
| device=grid_thw.device, | ||
| ) | ||
| torch.ops._C.fused_input_norm(out, grid_thw, self.weight, self.bias) |
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I feel we should register in torch.ops.vllm._xpu_fused_input_norm
jikunshang
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Sep 7, 2026
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/ci run |
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✅ Triggered Buildkite CI #87476 for commit |
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Sep 10, 2026
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com> Co-authored-by: Kunshang Ji <kunshang.ji@intel.com> Signed-off-by: Jyotirmoy Roy <jyotirmoyroy649@gmail.com>
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On XPU, dispatch FusedInputNorm.forward to the fused_input_norm custom kernel (torch.ops._C.fused_input_norm) when the input is uint8 and the affine weight/bias are fp32. The eager path materializes an fp32 intermediate and casts back, adding device-side compute that cancels the bandwidth saving of transferring uint8 pixel_values on XPU. The fused kernel reads uint8 directly and writes the visual dtype in a single pass, and is numerically identical to the broadcasted multiply-add fallback that is kept for all other cases.
Requires the fused_input_norm op from vllm-xpu-kernels.