add 2/3/5/6/7 CUDA support in AutoRound format - #52890
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Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com>
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please have a review when you are free |
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This pull request has merge conflicts that must be resolved before it can be |
Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com>
Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com>
Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com>
Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com>
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/ci run |
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✅ Triggered Buildkite CI #86988 for commit |
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/ci retry |
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✅ Queued 13 failed job(s) for retry in Buildkite CI #86988. |
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/ci retry |
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✅ Queued 13 failed job(s) for retry in Buildkite CI #86988. |
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No actionable comments were generated in the recent review. 🎉 ℹ️ Recent review info⚙️ Run configurationConfiguration used: Repository UI Review profile: CHILL Plan: Team Run ID: 📒 Files selected for processing (3)
Included review availability: Your plan provides up to 10 included reviews per hour; 9 remain after this review. 📝 SummarySummary by CodeRabbit
WalkthroughThe change expands INC bit-width declarations and routes selected CUDA WNA16 linear and MoE configurations to Humming. CUDA tests cover Humming dispatch for 2- and 3-bit layers and existing INC dispatch for 4- and 8-bit layers. ChangesCUDA WNA16 Humming routing
Estimated code review effort: 3 (Moderate) | ~20 minutes Merge Risk: ⚪ Minimal · up to This change enables CUDA Humming routing for supported low-bit AutoRound formats while retaining existing 4- and 8-bit linear behavior. Current coverage supports merge readiness with no active merge-blocking risk. Suggested reviewers: Sequence Diagram(s)sequenceDiagram
participant LayerConfig
participant INCWNA16LinearScheme
participant HummingMethod
LayerConfig->>INCWNA16LinearScheme: provide CUDA WNA16 bit width
INCWNA16LinearScheme->>HummingMethod: build Humming method for supported low-bit width
🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (4 passed)
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/ci run |
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✅ Triggered Buildkite CI #87195 for commit |
Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com> Signed-off-by: Jyotirmoy Roy <jyotirmoyroy649@gmail.com>
Purpose
Restore CUDA support for 2-bit and 3-bit AutoRound formats
Test Plan
https://huggingface.co/Intel/Qwen3.8-27B-bpw2.8-AutoRound
Test Result
pass
Essential Elements of an Effective PR Description Checklist
supported_models.mdandexamplesfor a new model.cc @jikunshang