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Hi @tuukkjs It is my PR: |
Enable the AMD DeepSeek-V4 drafter to consume checkpoint confidence probabilities required by confidence-scheduled verification while preserving fixed-K fallback behavior. Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Use device-length-aware flattened indexer metadata so uneven adaptive verification budgets remain safe during variable-length FULL graph replay on ROCm. Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Align graph support with adaptive mode, report the effective decode path, and document the device/CPU token-total invariant. Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Protect the shared flattened-query integration, single-request fast path, graph-padded replay, and confidence-head finalization after rebasing onto the common SM90 design. Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Select ROCm adaptive flattening directly without a model-specific metadata builder. Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Replace an optimization-removable assertion with an explicit runtime error and cover the missing-checkpoint-head path. Co-authored-by: larryli2-amd <larryli2@amd.com> Signed-off-by: larryli2-amd <larryli2@amd.com> Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Reproduction EnvironmentHardware
Model
Container ProvenanceThe performance validation used a locally derived, pinned image: The exact image tag is a locally derived artifact rather than a public registry image. A byte-identical reproduction requires access to that image or reconstruction from the pinned base digest and the exact AITer wheel above. Serving Configurationexport VLLM_ROCM_USE_AITER=1
export VLLM_USE_V2_MODEL_RUNNER=1
export VLLM_USE_BREAKABLE_CUDAGRAPH=1
export VLLM_ADAPTIVE_VERIFICATION_PROFILE_CONTEXT_LEN=8192
export AITER_USE_CK_MOE_SORTING=0
export AITER_USE_FLYDSL_MOE_SORTING=0
export VLLM_ROCM_AITER_MOE_DISPATCH_POLICY=0
vllm serve /models/DeepSeek-V4-Flash-DSpark \
--served-model-name dsv4flash \
--tensor-parallel-size 8 \
--data-parallel-size 1 \
--async-scheduling \
--enable-prefix-caching \
--max-model-len 32768 \
--max-num-seqs 256 \
--max-num-batched-tokens 16384 \
--distributed-executor-backend mp \
--gpu-memory-utilization 0.8 \
--kv-cache-dtype fp8 \
--trust-remote-code \
--moe-backend aiter \
--tokenizer-mode deepseek_v4 \
--reasoning-parser deepseek_v4 \
--compilation-config '{"mode":3,"cudagraph_mode":"FULL_AND_PIECEWISE","max_cudagraph_capture_size":2048}' \
--speculative-config '{"method":"dspark","num_speculative_tokens":7,"enable_adaptive_verification":true}'Throughput MethodologyThe benchmark used a frozen 880-request SPEED-Bench Throughput-1K request set: |
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Hi @dllehr-amd |


Purpose
Enable DSpark confidence-scheduled adaptive verification for DeepSeek-V4 on ROCm. Developed with contributions from @larryli2-amd, who added explicit missing-confidence-head error handling and provided the MI350X performance validation.
This change:
Adaptive verification can redistribute a fixed draft-token budget between requests on device, so CPU request boundaries can differ from final device boundaries. The flattened path builds request ownership, context lengths, and block-table rows from device decode lengths. It reuses the shared flattening selection introduced by #52795 and keeps the ROCm capability scoped to the DeepSeek-V4 builder. NVIDIA and unrelated ROCm indexers are unchanged.
The ROCm sparse MLA/SWA declarations are similarly scoped. Their ragged metadata is device-boundary-derived and copied into persistent buffers before FULL graph replay.
AI assistance was used in preparing this PR.
Test plan
next_n, and adaptive-verification tests;Test results
Source and focused tests
ea586873d5210d9e1624c42333be1b02c276c832onto upstreamcd10ed6f9f6b37a8ace9cf380007e66fe12ec0c3;10 passed) and the shared adaptive-verification suite passed (13 passed).Performance validation — 8x MI350X
Performance validation contributed by @larryli2-amd used 8x AMD Instinct MI350X at TP=8 with
deepseek-ai/DeepSeek-V4-Flash-DSpark.This PR changes only vLLM; it does not modify or vendor AITER source code. The benchmark environment used a locally rebuilt, pinned AITER wheel installed into the derived image with
--no-deps, leaving the base PyTorch and Triton installations unchanged:vllm/vllm-openai-rocm@sha256:72e90adf360ccffb231a098a15eadfb808719c029c6cd43f6386095064552b7e;0.1.21.post2.dev2+g804648bcb;804648bcbf87646ddef4b7add10da9c3b322567c;30360d15819a9c8e3ec8e4ae665683abf4c5358d5be1f49a9aa2f7962c0032db;2.12.0+rocm10.0.0.The pinned wheel was used because the stock AITER post1 environment had a known GPU-fault issue in this setup.
The server used Model Runner V2, breakable CUDA graphs, async scheduling, prefix caching, FP8 KV cache,
max_num_seqs=256,max_num_batched_tokens=16384, andFULL_AND_PIECEWISEcapture through 2048. Adaptive DSpark used K<=7 and an 8192-token profiling context.The benchmark used a frozen 880-request SPEED-Bench Throughput-1K request set at temperature 1, top-p 1, and maximum output length 2048. Concurrency ran in descending order from 256 to 4. Each point used an independent cold server boot, two 64-request warmups, matching client/server generated-token counts, zero preemptions, and no GPU faults.
Compared with fixed-length verification, confidence-scheduled DSpark delivered comparable performance at low concurrency and higher throughput at high concurrency. The complete serving command and environment details are preserved in the reproduction comment.
Correctness validation — 8x MI355X
The complete four-arm GSM8K 5-shot validation used TP=8, expert parallel disabled, FP8 KV, probabilistic DSpark, and
FULL_AND_PIECEWISE. Pins were upstream10704541aaf72567fe9d6229b3e3d84d37f2ddba, PR head3fbcf64cfae8cd9d2180ceed0c92ba025f4dde30, model revision7872f01b1d1fe23eabc4c98b48bffcef5a386062, and ROCm nightly73029d42441321b631779db3475031f5ec26dd6c.All four 1,319-sample evaluations completed:
0.9431 +/- 0.00640.9431 +/- 0.00640.9416 +/- 0.00650.9409 +/- 0.00650.9462 +/- 0.00620.9462 +/- 0.00620.9401 +/- 0.00650.9401 +/- 0.0065The strict-score range was
0.0061, within one reported standard error.Current ROCm qualification
On current ROCm main/nightly, DeepSeek-V4 defaults to Model Runner V1, while DSpark requires Model Runner V2. Set
VLLM_USE_V2_MODEL_RUNNER=1when launching this feature.ROCm breakable CUDA graphs were disabled by default for every architecture in #53155. DeepSeek V4 adaptive throughput regresses without that execution mode, so the validated launch configuration also sets
VLLM_USE_BREAKABLE_CUDAGRAPH=1.