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[ROCm][Bugfix] Keep the MLA query in bf16 for AITER Gluon fp8 KV decode - #50563

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ZhengGong-amd:fix/aiter-mla-gluon-bf16-query-fp8-kv
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ZhengGong-amd:fix/aiter-mla-gluon-bf16-query-fp8-kv

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@ZhengGong-amd ZhengGong-amd commented Jul 31, 2026

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Purpose

Fixes fp8 KV cache on the ROCm AITER MLA backend for models with fewer than 16
MLA heads per rank.

AiterMLAImpl inherits supports_quant_query_input = True from
MLACommonImpl, so with an fp8 KV cache the common MLA layer pre-quantizes the
decode query
(mla_attention.py
if fp8_attention and self.impl.supports_quant_query_input:).

For fewer than 16 heads the backend dispatches decode to AITER's Gluon MLA
kernel. Its fp8 KV regime (bh16bn128) is a bf16-query / fp8-KV kernel: it
folds the KV dequant scale into the QK temperature and asserts a bf16 query. So
the pre-quantized query is rejected and the engine dies during init:

RuntimeError: Worker failed with error
  'q_nope/q_pe must be bf16, got torch.float8_e4m3fn/torch.float8_e4m3fn'
RuntimeError: Engine core initialization failed.

Kimi-K3 TP8 hits this: 96 MLA heads over 8 ranks is 12 heads per rank.

Fix

Leave the query unquantized for that combination, exactly as TritonMLAImpl
already does for its own fp8 KV path
(triton_mla.py):

if num_heads < AiterMLAHelper._AITER_MIN_MLA_HEADS and is_quantized_kv_cache(
    self.kv_cache_dtype
):
    self.supports_quant_query_input = False

Head counts of 16 and above are untouched and keep using the fp8 query the asm
kernels expect. bf16 KV caches are untouched at every head count.

Test Plan

Serve Kimi-K3 TP8 on gfx950 with --kv-cache-dtype fp8 and drive concurrent
decode, comparing against the same run without the flag.

Hardware   8x AMD Instinct MI355X (gfx950), ROCm 7.2.3
vLLM       0.1.dev19253+g5f76ae224.d20260727
AITER      0.1.17.dev395+g68e42f5f4 + ROCm/aiter#4480
Model      Kimi-K3 (MXFP4), TP8 -> 12 MLA heads/rank
export VLLM_ROCM_USE_AITER=1
export NCCL_DMABUF_ENABLE=0
export VLLM_ALLREDUCE_USE_FLASHINFER=1
export VLLM_ENGINE_READY_TIMEOUT_S=3600
export HSA_NO_SCRATCH_RECLAIM=1        # MEC firmware 34 < 177

vllm serve /root/models/Kimi-K3 --port 39005 \
  --tensor-parallel-size=8 \
  --gpu-memory-utilization 0.9 \
  --max-model-len 13312 \
  --trust-remote-code \
  --enable-prefix-caching \
  --moe-backend auto \
  --load-format auto \
  --max-num-seqs 512 \
  --max-cudagraph-capture-size 256 \
  --kv-cache-dtype fp8          # omitted for the bf16 baseline

Load generator: N concurrent /v1/completions requests at temperature=0,
each with a unique ~8192-token prompt and max_tokens=256. Identical protocol
on both sides: one discarded warmup pass, then five timed repetitions of 64
requests at concurrency 32; the first timed repetition was a cold outlier on
both sides and is excluded.

Test Result

Without this change the server never reaches startup; it fails engine init with
the q_nope/q_pe must be bf16 error above. With it, Application startup complete, and 64/64 requests succeed in every repetition.

Capacity, from the engine's own accounting (deterministic across reboots):

bf16 KV fp8 KV delta
Available KV cache memory 48.21 GiB 43.71 GiB
GPU KV cache size 1,348,394 tok 1,955,976 tok +45%
max concurrency @ 13312 101.29x 146.93x +45%

Throughput at ISL 8192 / OSL 256 / concurrency 32:

bf16 KV fp8 KV
throughput median 579.9 tok/s 600.2 tok/s
throughput range (4 reps) 559.9 - 611.5 517.6 - 626.9
p50 latency median 11.4 s 10.9 s

fp8 is 3.5% faster at the median, but the ranges overlap, so this is within
run-to-run variance and is not claimed as a speedup. The benefit of fp8 KV on
this model is the +45% capacity; MLA is only ~10% of GPU time at this shape.

Greedy output is byte-identical between fp8 and bf16 for the shared prompts.
(Capacity grows +45% rather than 2x because only Kimi-K3's 24 full-attention
layers use the MLA cache; the other 69 are KDA and are not quantized.)

Kernel-level numerics for the fp8 regime at batch > 1 were validated separately
against an fp32 reference over the dequantized cache; see the companion AITER
PR.

Companion PR

This change alone is not sufficient: AITER's mla_gluon also asserts
batch_size == 1 in the bh16bn128 regime, so with only this PR the server
fails with mla_gluon[bh16bn128] requires batch_size=1, got 512.

The two are mutually dependent for fp8 KV to work and independently harmless,
since fp8 KV on small-head MLA is currently broken in every combination. Merge
order does not matter.

Related

  • [Bug][ROCm][MI355X] Kimi-K3 TP8 crashes in ROCM_AITER_MLA with HIP Code 700 #50347 is a different failure on the same kernel and the same MI355X /
    Kimi-K3 TP8 stack (illegal memory access at ~337K context). It is not
    addressed here: that report's KV pool works out to roughly 2.10M slots
    (337,128 tokens at 16.08% usage), which is below the 3.73M-slot int32
    row-base limit fixed in the companion AITER PR, so the two are distinct.
  • [ROCm] Enable 12-head MLA persistent decode #50371 enables the same 12-head Kimi-K3 TP8 decode shape via head padding
    onto the 16-head persistent asm kernel, but is restricted to bf16 query and
    bf16 KV, so it does not overlap with this fp8 path.

Found and validated with ROCm Hyperloom, an agentic system that auto-optimizes LLM inference workloads on AMD GPUs.

AiterMLAImpl inherits supports_quant_query_input = True from MLACommonImpl,
so with an fp8 KV cache the common MLA layer pre-quantizes the decode query
before calling the backend. For fewer than 16 heads the backend dispatches to
AITER's Gluon MLA kernel, whose fp8 KV regime (bh16bn128) is a bf16-query /
fp8-KV kernel: it folds the KV dequant scale into the QK temperature and
asserts a bf16 query. The result on gfx950 is that any small-head model with
--kv-cache-dtype fp8 dies during engine init with

  RuntimeError: Worker failed with error
    'q_nope/q_pe must be bf16, got torch.float8_e4m3fn/torch.float8_e4m3fn'

Kimi-K3 TP8 hits this: 96 MLA heads over 8 ranks is 12 heads per rank.

Leave the query unquantized for that combination, the same way TritonMLAImpl
already does for its own fp8 KV path. Head counts of 16 and above are
unaffected and keep using the fp8 query the asm kernels expect.

Signed-off-by: Zheng Gong <zgong@amd.com>

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🚀

@mergify mergify Bot added rocm Related to AMD ROCm bug Something isn't working labels Jul 31, 2026
@github-project-automation github-project-automation Bot moved this to Todo in AMD Jul 31, 2026
@ZhengGong-amd
ZhengGong-amd force-pushed the fix/aiter-mla-gluon-bf16-query-fp8-kv branch from fc5da58 to 6e6a889 Compare July 31, 2026 10:39
YukioZzz added a commit to YukioZzz/vllm that referenced this pull request Aug 8, 2026
… an env var

VLLM_K3_MLA_MERGE_ACROSS_BACKENDS=0 restores the pre-1755c10c behaviour, where a differing
indexes_kv_by_block_stride forces MLA layers into separate KV-cache groups. Default is
unchanged, so this is a no-op unless the variable is set.

This exists to bisect the merge itself, which is now the leading suspect for the fault that
needs both DSpark and the Mooncake tier:

    DSpark off, tier on                clean, concurrency 1/8/16 at 900 s each
    DSpark on,  tier off               clean 420 s, acceptance 1.18
    DSpark on,  tier on                HSA_STATUS_ERROR_EXCEPTION 0x1016 at 106 s
    DSpark on,  tier on, acceptance 1  clean 460 s
    DSpark on,  tier on, acceptance 8  fault at 121 s

The merge is the only structural thing enabling DSpark changes about the store. Its own
per-group logging shows the draft's five MLA layers joining the target's MLA group:

    DSpark off   segments per group={0: 23, 1: 23, 2: 23, 3: 24}
    DSpark on    segments per group={0: 23, 1: 23, 2: 23, 3: 29}

Excluding those five layers from the store while leaving them in the group was tried first
(branch yichaozhu/k3-dspark-no-draft-offload) and did not help: 93 segments registered, group 3
addressing 24 of its 29 layers, and it still faulted at 116 s. So if the merge is implicated it
is through sharing the group -- the block-id namespace and the block table -- rather than
through the draft's bytes being in the store's value.

Setting this to 0 costs 1.65x KV capacity, because the draft's 5 layers are then padded up to a
24-layer bucket ("Add 19 padding layers, may waste at most 380.00% KV cache memory"), and the
native 1M context stops fitting at all. The bisect therefore has to lower max-model-len, and the
control arm has to lower it identically so that memory pressure is not the variable under test.

Enabling an fp8 KV cache would buy the capacity back and let the merge be tested at the full 1M
shape, but that needs four pieces this fork does not have -- ROCm/aiter#4480 (still open),
vllm-project#50563, arguably vllm-project#50619 for the DSpark fp8 verify step, and fp8 added to
AiterMLABackend.supported_kv_cache_dtypes, which currently lists only auto/float16/bfloat16 --
and it would change the target's attention kernel, which is the thing being held fixed. Matching
max-model-len between the two arms answers the same question without any of that.
@ZhengGong-amd

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Closing this in favour of #51011, which is the right fix.

This PR assumed fp8 KV decode would keep going through the Gluon kernel, and
made the query stay bf16 so bh16bn128 would accept it. Two things since have
made that the wrong direction:

Under that routing my change is not merely redundant, it is harmful: the
predicate here is num_heads < 16 and is_quantized_kv_cache(...), which now
also covers the padded asm path, and that path needs the pre-quantized fp8
query. Merging this would strip it.

#51011 also shows my validation was too weak to justify the claim I made. I
compared greedy output on a handful of short prompts and saw it match bf16;
a full GSM8K run there measures 74.00% with 285/1319 degenerate completions on
main, which a smoke test of that size cannot see.

The companion AITER change (ROCm/aiter#4480) is being narrowed to what still
stands on its own: removing the stale batch_size == 1 assert from the Gluon
fp8 regime, which #51011 also cites as failure mode 1. It no longer claims to
enable fp8 serving.

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