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refactor: streamline DeepSeek V4 mHC warmup and remove token-size cap - #47807

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@leihuang-sketch

@leihuang-sketch leihuang-sketch commented Jul 7, 2026

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co-author:@chungen04 @SyaOtiLan

Purpose

DeepSeek-V4 inference suffers from multi-second latency spikes caused by TileLang JIT compilation of mHC (multi-head-compression) kernels when the scheduler encounters token sizes that were not warmed up. The existing warmup only covers a fixed set of power-of-two token sizes up to 16,384, leaving all other prefill shapes uncompiled.

kernel mhc_pre_big_fuse_with_norm_tilelang cost about 10s+, log info
'''
(Worker_TP1 pid=1099) 2026-07-06 16:03:24 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_pre_big_fuse_with_norm_tilelang with out_idx=None
(Worker_TP0 pid=1098) 2026-07-06 16:03:24 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_pre_big_fuse_with_norm_tilelang with out_idx=None
(Worker_TP2 pid=1100) 2026-07-06 16:03:24 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_pre_big_fuse_with_norm_tilelang with out_idx=None
(Worker_TP3 pid=1101) 2026-07-06 16:03:24 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_pre_big_fuse_with_norm_tilelang with out_idx=None
(Worker_TP1 pid=1099) 2026-07-06 16:03:34 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:141): TileLang completes to compile kernel mhc_pre_big_fuse_with_norm_tilelang
(Worker_TP0 pid=1098) 2026-07-06 16:03:34 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:141): TileLang completes to compile kernel mhc_pre_big_fuse_with_norm_tilelang
(Worker_TP2 pid=1100) 2026-07-06 16:03:34 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:141): TileLang completes to compile kernel mhc_pre_big_fuse_with_norm_tilelang
(Worker_TP3 pid=1101) 2026-07-06 16:03:34 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:141): TileLang completes to compile kernel mhc_pre_big_fuse_with_norm_tilelang
(Worker_TP1 pid=1099) 2026-07-06 16:03:48 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_post_tilelang with out_idx=None
(Worker_TP0 pid=1098) 2026-07-06 16:03:48 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_post_tilelang with out_idx=None
(Worker_TP3 pid=1101) 2026-07-06 16:03:49 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_post_tilelang with out_idx=None
(Worker_TP2 pid=1100) 2026-07-06 16:03:49 [TileLang:tilelang.jit.kernel:INFO] (kernel.py:133): TileLang begins to compile kernel mhc_post_tilelang with out_idx=None

'''

This PR removes the hard 16_384 auto-warmup cap and instead warms up every token size from 1 to max_num_batched_tokens, ensuring that any shape the scheduler may produce is compiled before serving traffic.

What Changed

vllm/model_executor/warmup/deepseek_v4_mhc_warmup.py

  • Removed _AUTO_WARMUP_MAX_TOKENS and _DEFAULT_TOKEN_SIZE_CANDIDATES.
  • _select_mhc_warmup_token_sizes now generates a contiguous range [1, max_tokens] instead of a sparse list.
  • _warmup_layer_mhc now uses real attn_norm/ffn_norm weights and variance_epsilon so norm-fused TileLang kernels are exercised with runtime tensors.
  • Added progress logging every 1,000 token sizes.
  • Added warmup for the fused mhc_fused_post_pre_tilelang post+pre variant used after the first layer.
  • Simplified verbose comments.
    Coding by ai

Test Plan

Test Result


Essential Elements of an Effective PR Description Checklist
  • The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
  • The test plan, such as providing test command.
  • The test results, such as pasting the results comparison before and after, or e2e results
  • (Optional) The necessary documentation update, such as updating supported_models.md and examples for a new model.

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Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

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@leihuang-sketch

leihuang-sketch commented Jul 10, 2026

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@lucifer1004 @zyongye can you review it?
mHC warmup: unresolved on main, fixed on streamline/mhc-warmup
On main, the entire mHC warmup is a no-op on NVIDIA — it never runs.
main was written against the AMD interface, which requires the decoder layer to expose hc_pre/hc_post method attributes. NVIDIA's DeepseekV4DecoderLayer calls the imported mhc_pre_tilelang / mhc_fused_post_pre_tilelang functions directly and lacks these wrapper attributes, so layer detection fails → warmup returns early.
5 defects (all in deepseek_v4_mhc_warmup.py):

  1. Layer not found — _find_first_mhc_layer requires hc_pre+hc_post; NVIDIA has neither → warmup returns.
  2. AttributeError even if found — calls layer.hc_pre(...), which doesn't exist on NVIDIA.
  3. Missing mhc_fused_post_pre warmup — NVIDIA's per-layer hot path, never warmed on main.
  4. hc_head returns early — NVIDIA has no hc_head_op; main does if hc_head_op is None: return.
  5. Token sizes capped at 16384 — max_auto_tokens = min(max_tokens, 16384), missing all shapes > 16384.
    streamline/mhc-warmup (7 commits ahead, same single file) adds the NVIDIA direct-call path: drops the attribute requirement, calls mhc_pre_tilelang directly, adds mhc_fused_post_pre_tilelang warmup, adds the hc_head TileLang branch, and covers the real max_tokens.
    Recommend merging streamline/mhc-warmup into main — otherwise the ~10s mhc_pre_big_fuse_with_norm_tilelang JIT spike cannot be eliminated on NVIDIA.

@chungen04

chungen04 commented Jul 10, 2026

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I am also seeing the TTFT and queuing spikes due to the miss of warmup kernels in DSv4 (on v0.25.0rc2). Looks like this is the solution.


logger = init_logger(__name__)

# Auto-warmup token sizes. TileLang mHC kernels treat ``num_tokens`` as a

@chungen04 chungen04 Jul 10, 2026

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I still ran into a few missed warmup with this, and here is the trace (I can provide a commit on this PR to mitigate this). Following is the trace:

  • The power-of-two grid leaves most n_splits buckets cold.

  • n_splits is one of the key to compile the kernel:

  • How runtime picks n_splits: Both dispatchers derive it from the actual token count of the batch:

  • So with block_m = 64, a warmup at token size 2^k only ever produces n_splits = n_sms // ceil(2^k / 64) — i.e. n_sms // 2^j. But any real prefill length reaches n_sms // g for arbitrary g: e.g. a ~3000-token prefill → grid = 47 → n_splits = n_sms // 47, a value no power-of-two size can generate. First request in that bucket pays the full TileLang compile (~8–10 s) on every TP worker simultaneously, while the batch is blocked.

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Thanks for the detailed trace — you're right, and the analysis is spot on.

I actually went with the brute-force approach locally: warming up the full
1 ~ max_tokens range. It produces a lot of redundant warmups (many adjacent
token sizes map to the same n_splits), but it guarantees every bucket is
covered and never hits a cold JIT at runtime.

You're correct that the power-of-two grid in this PR only generates
n_splits = n_sms // 2^j, which misses the vast majority of n_splits = n_sms // g
buckets that real prefill lengths hit. A ~3000-token prefill → grid = 47 →
n_splits = n_sms // 47 is a great example — no 2^k will ever produce that.

Happy to accept a commit on this PR. Instead of just re-padding with more
candidates, would you consider dedup'ing on the n_splits dimension directly?
E.g. iterate grid_size from 1 to cdiv(max_tokens, 64), pick one representative
token count per distinct n_splits value, and warmup those — same coverage
guarantee as the exhaustive approach but without the redundant compiles.

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@leihuang-sketch Thanks! Created a PR at your fork. Please check.

@leihuang-sketch leihuang-sketch Jul 12, 2026

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Thank you, co-author has been added, and can you post the test results

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A quick test for equivalence of exhausted input token and this change:

docker run --rm --gpus '"device=0"' --entrypoint python3 <image_name> -c "from vllm.model_executor.kernels.mhc.tilelang_kernels import compute_num_split
from vllm.model_executor.warmup.deepseek_v4_mhc_warmup import _mhc_split_bucket_sizes
from vllm.utils.math_utils import cdiv

max_tokens, k = 16384, 4 * 7168
sizes = _mhc_split_bucket_sizes(max_tokens, k)
warmed = {compute_num_split(64, k, cdiv(s, 64)) for s in sizes}
exhaustive = {compute_num_split(64, k, cdiv(t, 64)) for t in range(1, max_tokens + 1)}
assert warmed == exhaustive
print(f'bucket sizes ({len(sizes)}): {sizes}')
print(f'warmed ({len(warmed)}): {sorted(warmed)}')
print(f'exhaustive ({len(exhaustive)}): {sorted(exhaustive)}')
"

Result

>>>
bucket sizes (23): [64, 128, 192, 256, 320, 384, 448, 512, 576, 640, 704, 768, 832, 896, 960, 1088, 1216, 1408, 1600, 1920, 2432, 3200, 4800]
warmed (23): [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16, 18, 21, 24, 29, 37, 49, 74, 112]
exhaustive (23): [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16, 18, 21, 24, 29, 37, 49, 74, 112]

Also tested on live traffic that the TTFT spike issue was mitigated.

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We might have to update this docstring as well.

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Fixed

@chungen04

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@leihuang-sketch I saw the remaining missing kernels as well, would love a fix in this PR (left to you). Also I am using DSv4 DSpark (on both Flash and Pro; available starting v0.25.0) speculative decoding. Can you check if there is warmup kernels missing over there?

@leihuang-sketch

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@leihuang-sketch I saw the remaining missing kernels as well, would love a fix in this PR (left to you). Also I am using DSv4 DSpark (on both Flash and Pro; available starting v0.25.0) speculative decoding. Can you check if there is warmup kernels missing over there?

@chungen04 They have been sorted out in the aforementioned table, and there are approximately 4 of them

@DiegoCao

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I noticed the similar issue before of deepseek mHC warmup issue.

@leihuang-sketch

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I noticed the similar issue before of deepseek mHC warmup issue.
@DiegoCao
In fact, the warm-up of MHC is the most time-consuming, but it is not the one with the widest impact. The ones with the widest impact are several kernels in Triton

@chungen04

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@leihuang-sketch following up -- is there anything blocking? Also the pre-commit is failing, looks like you have to do signoff on each commit.

@leihuang-sketch

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Currently, there are no blocking issues, and approval from the code reviewer is required

@leihuang-sketch following up -- is there anything blocking? Also the pre-commit is failing, looks like you have to do signoff on each commit.

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Hey @leihuang-sketch, I noticed your recent PRs related to kernel warmup (#47807, #48804, #48805, #48806, #48807).

We're currently migrating all kernel warmups to a shared warmup contract. See #47451, RFC: #47456.

Would you mind migrating these warmups to conform to that shared contract? It would help keep the warmup infrastructure consistent and make future maintenance easier.

Other than this, my general recommendation is to avoid brute-forcing warmups with variables not responsible of triggering kernel re-compilations. Try to warm up actual compile keys instead of running representative non-key inputs, such as token sizes, and hoping they map to all required specializations. That mapping is not always obvious or guaranteed, so warmup should target the compile-key space directly. Thanks!

@leihuang-sketch

leihuang-sketch commented Jul 23, 2026

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PR Update
Context
This PR addresses feedback from @LopezCastroRoberto on migrating mHC warmup to the shared VllmJitKernel contract (#47451, RFC #47456), as discussed in #47807 / #48804#48807. The key ask was to avoid brute-forcing warmups with non-key inputs (token sizes) and instead target the compile-key space directly.
Root Cause
warmup hardcoded hc_post_mult_value=1.0 and sinkhorn_repeat=1, which did not match the runtime values (2.0 and 20). This caused TileLang cache_key mismatch → JIT recompilation during inference (~10s each).
Changes

  1. Add compute_mhc_dispatch() as the single source of truth for n_splits / tile_n / use_small_fma derivation, shared between runtime ops (tilelang.py) and warmup wrappers (warmup.py) — eliminates duplicated dispatch logic.
  2. Add MhcKernelConstants to collect model-level cache_key constants (hc_post_alpha, hc_sinkhorn_iters, epsilons) from the model layer instead of hardcoding them.
  3. Cover the broadcast kernel path (mhc_pre_big_fuse_broadcast_with_norm_tilelang), introduced in 442c421 but never warmed before.
  4. Merge dispatch and _dispatch_broadcast into a single dispatch with is_broadcast as an explicit list dimension, controlled by detecting hc_attn_fn_broadcast on the model layer.
  5. Add _compile_and_cache to fill both TileLang cache layers (global KernelCache + per-instance _kernel_cache), preventing false-positive jit_monitor warnings.
  6. Add progress logging to VllmJitKernel.warmup() base class.
    Test Results
    All 12 unit tests pass (dispatch correctness, key dedup, frozen/hashable, broadcast coverage). Serving test on DSv4-Flash (4×H100, TP=4) confirms zero mHC TileLang JIT compilations during inference.
    cc @chungen04

@mergify

mergify Bot commented Jul 29, 2026

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This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @leihuang-sketch.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

@leihuang-sketch

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DCO is fixed (unified author/committer email and Signed-off-by trailers across all commits). The branch is now MERGEABLE with no conflicts.

This PR fixes a real production issue: on main, the entire DeepSeek V4 mHC warmup is a no-op on NVIDIA (never runs), causing TTFT and queuing spikes (reported by @chungen04 on v0.25.0rc2).

Could someone help review and approve, and add the verified/ready label so CI can run? Thanks!

cc @LopezCastroRoberto @lucifer1004 @yewentao256

@leihuang-sketch
leihuang-sketch force-pushed the streamline/mhc-warmup branch 2 times, most recently from 2e3b220 to 44c403b Compare July 31, 2026 09:09
@SyaOtiLan

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I found this PR while checking for overlapping work after opening #51802.

After comparing the two, #47807 is the earlier and more comprehensive implementation of the same NVIDIA mHC warmup fix, and it follows the shared VllmJitKernel warmup direction tracked by #49349.

I have documented the overlap in #51802 and paused further changes there. Since this branch currently needs a rebase, I will follow its status before deciding how to handle #51802.

I’m happy to help with the rebase or testing if needed.

@leihuang-sketch

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Hi @SyaOtiLan, thanks a lot for the thorough comparison and for documenting the overlap in #51802. Really appreciate you flagging that #47807 is the earlier and more comprehensive implementation — that helps avoid duplicate work.

I'd love your help with the rebase. The branch is currently in MERGEABLE-with-conflicts territory, so a rebase against latest main is the immediate next step. Once that's done, it'd be great if you could also help verify the warmup behavior on your side (the unit tests for dispatch correctness / cache_key dedup are the cheapest sanity check, and a serving run on DSv4-Flash would confirm zero mHC TileLang JIT during inference).

For #51802, let's keep it paused for now and revisit once this one is in. Thanks again!

@mergify mergify Bot added the DSv4 label Aug 19, 2026
@SyaOtiLan

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Hi @leihuang-sketch, I rebased the work onto 754e1c3de (main at the time of testing) and put the result here:

https://github.com/SyaOtiLan/vllm/tree/help/rebase-47807

The complete rebased branch can be fetched directly from my fork and used to update the existing PR branch.

The rebase also includes two follow-up changes:

  • Integration with the current JitWarmupRegistry and resolution of conflicts against the current main branch.
  • Warmup coverage for the non-DeepGEMM hc_prenorm_gemm_tilelang fallback specializations.

While validating on an RTX 4090, I found that the rebased warmup covered the wrapper keys, but a 17-token runtime probe still compiled hc_prenorm_gemm_tilelang (cache 0 -> 1, about 1.37 seconds). With the additional fallback warmup, probes at 17, 128, and 1024 tokens all produced zero runtime cache delta.

Validation passed:

  • Ruff and format checks
  • 50 focused tests in test_jit_warmup.py and test_mhc_warmup_wrappers.py

I do not have access to an H20 or the DeepSeek-V4-Flash checkpoint, so the original H20 serving scenario still needs verification.

Please take a look when convenient. I’m happy to adjust the branch based on your feedback.

@leihuang-sketch

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Hi @SyaOtiLan, thanks for the rebase and the thorough validation — really solid work, especially catching the non-DeepGEMM hc_prenorm_gemm_tilelang fallback gap on the 4090.

To keep everything under one roof and make this PR easy to manage, could you open a PR from your help/rebase-47807 branch into my fork's streamline/mhc-warmup?

  • Base: leihuang-sketch/vllm:streamline/mhc-warmup
  • Head: SyaOtiLan/vllm:help/rebase-47807

That way I can review the rebase + your two follow-up commits (JitWarmupRegistry integration, hc_prenorm_gemm_tilelang fallback warmup) in one place, merge them into the PR branch cleanly with proper attribution, and push the updated streamline/mhc-warmup back here to #47807. Co-authored-by trailers for your work are welcome.

Once merged, the H20 / DSv4-Flash serving verification is still the open item — I'll take that on (or we can coordinate if you get access in the meantime).

A couple of asks when opening the PR:

  • Keep commits granular (don't squash the rebase and the two follow-ups into one), so review is easier.
  • If the hc_prenorm_gemm_tilelang fallback change touches dispatch logic, please call it out explicitly in the PR description.

Also, could you attach the test data in the PR description? Specifically:

  • The 50 focused tests in test_jit_warmup.py and test_mhc_warmup_wrappers.py — full pytest output (or a summary table with pass/fail counts).
  • The runtime cache delta probe results at 17 / 128 / 1024 tokens, both before and after the hc_prenorm_gemm_tilelang fallback warmup (the cache 0 -> 1, ~1.37s spike you observed, plus the zero-delta result after the fix).
  • Ruff / format check output.

Having these captured in the PR makes it easy to reproduce and for reviewers (@LopezCastroRoberto / @yewentao256) to verify the gains when CI runs.

Thanks again — this unblocks the PR nicely.

@SyaOtiLan

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Opened the requested cross-fork PR:

https://github.com/leihuang-sketch/vllm/pull/2

It includes the cold-cache before/after results at 17, 128, and 1024 tokens, the 50 focused tests, and the Ruff/format output. The fallback change only precompiles the existing specializations and does not modify runtime dispatch.

GitHub currently reports the cross-fork PR as conflicting because the head contains the rebased history while the base still contains the pre-rebase history. The rebase and the two follow-up commits remain separate as requested. I can adjust the transfer method if you would prefer a different branch arrangement.

hanshuche and others added 10 commits August 26, 2026 21:58
- Remove the hard 16_384 auto-warmup token-size cap.
- Warm up all token sizes from 1 to max_num_batched_tokens to avoid
  TileLang JIT during inference for any prefill size the scheduler
  may encounter.
- Use real RMSNorm weights for norm-fused TileLang kernels.
- Add progress logging and warm up the fused post+pre variant.
- Simplify verbose comments throughout the module.

Co-authored-by: OpenCode <noreply@opencode.ai>
Signed-off-by: hanshuche <shicang@shicang>
- Remove [mhc-debug] tracing logs and periodic progress logger.info
- Remove start/finish logger.info messages
- Keep tqdm progress bar for warmup progress visibility
- Generalize instrument span name from "DeepSeek V4 mHC warmup" to "mHC warmup"

Co-authored-by: Claude
The previous change warmed up every integer token size from 1 to max_num_batched_tokens, causing up to tens of thousands of kernel launches. TileLang mHC kernels treat num_tokens as a dynamic dimension and only have shape breakpoints at small powers of two (small-FMA branches, split-k transitions, block-M specializations). Restore the capped power-of-2 grid up to 16384 while still including max_tokens and cudagraph capture sizes exactly.
Signed-off-by: hanshuche <shicang@shicang>
Signed-off-by: chungen04 <cho322@gatech.edu>
Signed-off-by: hanshuche <shicang@shicang>
Migrate DeepSeek V4 mHC TileLang kernel warmup to the shared
VllmJitKernel contract (RFC #47456 / PR #47451), as requested by
@LopezCastroRoberto in PR #47807 review.

Key changes:
- Add 3 VllmJitKernel wrappers next to the kernel definitions in
  vllm/model_executor/kernels/mhc/warmup.py (kernel-owned warmup):
  - MhcPreKernel: first-layer path (mhc_pre + mhc_post)
  - MhcFusedPostPreKernel: second-layer-and-after (mhc_fused_post_pre)
  - HcHeadFusedKernel: hc_head_fused_kernel_tilelang op
- Each wrapper exposes CompileKey / dispatch / get_warmup_keys / compile.
  The AST tracer in jit_warmup.py expands WarmupIntRange(1, max_tokens+1)
  and deduplicates to the actual compile-key set (~22-24 keys for a 16k
  token budget, vs. dozens of dummy-run token sizes before).
- Add vllm/model_executor/warmup/jit_warmup_tilelang_helper.py with
  TileLangWarmupTensor, a compile-only fake tensor descriptor (mirrors
  TritonWarmupTensor). compile() calls .compile() on the underlying
  @tilelang.jit kernels, which inspects only tensor metadata and never
  launches the kernel or allocates real GPU memory.
- Slim deepseek_v4_mhc_warmup.py from 354 to 111 lines: the per-kernel
  dispatch / compile-key enumeration / compile logic is now kernel-owned.
  Caller only does model walking + wrapper.warmup(vllm_config).
- Move deepseek_v4_mhc_warmup() call from unconditional execution to
  the enable_jit_warmup branch in kernel_warmup.py, alongside
  sparse_mla_triton_warmup and fa4_cutedsl_warmup.
- Add tests/model_executor/test_mhc_warmup_wrappers.py (CPU-only,
  no GPU/TileLang required) verifying CompileKey fields, dedup behavior,
  dispatch consistency, and compile-only contract.

Co-author: @chungen04
Signed-off-by: hanshuche <shicang@shicang>

Signed-off-by: hanshuche <FlyPanda@leihuang-sketch>
Add compute_mhc_dispatch() as the single source of truth for n_splits /
tile_n / use_small_fma derivation, shared between runtime ops
(tilelang.py) and warmup wrappers (warmup.py).

Add MhcKernelConstants to collect model-level cache_key constants
(hc_post_alpha, hc_sinkhorn_iters, epsilons) from the model layer
instead of hardcoding them, ensuring warmup keys match runtime keys.

Cover the broadcast kernel path (mhc_pre_big_fuse_broadcast_with_norm)
that was introduced in 442c421 but never warmed, causing runtime JIT.

Merge dispatch and _dispatch_broadcast into a single dispatch with
is_broadcast as an explicit list dimension, controlled by detecting
hc_attn_fn_broadcast on the model layer.

Add _compile_and_cache to fill both TileLang cache layers (global
KernelCache + per-instance _kernel_cache) so jit_monitor does not
report false-positive misses.

Add progress logging to VllmJitKernel.warmup() base class.

Signed-off-by: hanshuche <shicang@shicang>

Signed-off-by: hanshuche <FlyPanda@leihuang-sketch>
The VllmJitKernel.warmup() loop logged a progress/ETA/rate line per
compiled key (dozens-to-hundreds of lines per kernel), and the mHC
wrappers logged another line per compile() call plus _compile_and_cache.
On DSv4 this produced hundreds of INFO lines scrolling during startup.

Replace the per-iteration logger.info with a tqdm progress bar shown
only on rank 0 (mirrors deep_gemm_warmup). Keep one summary line at
start and finish. Remove the per-compile log spam from
_compile_and_cache, MhcPreKernel.compile, and
MhcFusedPostPreKernel.compile; the per-kernel total in get_warmup_keys
is sufficient.

Co-authored-by: opencode <opencode@anthropic.com>

Signed-off-by: hanshuche <FlyPanda@leihuang-sketch>
SyaOtiLan and others added 2 commits August 27, 2026 15:29
Precompile the regular and block-M TileLang specializations used by the non-DeepGEMM mHC prenorm path so the first runtime call does not trigger JIT compilation.

Add focused coverage verifying that the fallback warmup runs only when DeepGEMM is unavailable.

Assisted-by: OpenAI Codex
Signed-off-by: SyaOtiLan <954239196@qq.com>
[Warmup] Precompile fallback mHC prenorm kernels
@leihuang-sketch leihuang-sketch closed this by deleting the head repository Aug 28, 2026
@SyaOtiLan

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Hi @leihuang-sketch, I noticed that #47807 was closed after your latest branch update. Was this intentional, and do you plan to reopen or continue the work?

I’m asking because #52941 now addresses the same NVIDIA mHC warmup gap, while #47807 already implemented the shared JitWarmupRegistry direction and my fallback warmup work was based on it.

It would be helpful to know whether #47807 has been abandoned or should still be considered when deciding which implementation to move forward with.

@leihuang-sketch

leihuang-sketch commented Sep 10, 2026

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@SyaOtiLan Sorry, due to some reasons, we are unable to continue contributing at the moment. You can start another PR to complete it or support other contributors

SyaOtiLan pushed a commit to SyaOtiLan/vllm that referenced this pull request Sep 10, 2026
Migrate DeepSeek V4 mHC TileLang kernel warmup to the shared
VllmJitKernel contract (RFC vllm-project#47456 / PR vllm-project#47451), as requested by
@LopezCastroRoberto in PR vllm-project#47807 review.

Key changes:
- Add 3 VllmJitKernel wrappers next to the kernel definitions in
  vllm/model_executor/kernels/mhc/warmup.py (kernel-owned warmup):
  - MhcPreKernel: first-layer path (mhc_pre + mhc_post)
  - MhcFusedPostPreKernel: second-layer-and-after (mhc_fused_post_pre)
  - HcHeadFusedKernel: hc_head_fused_kernel_tilelang op
- Each wrapper exposes CompileKey / dispatch / get_warmup_keys / compile.
  The AST tracer in jit_warmup.py expands WarmupIntRange(1, max_tokens+1)
  and deduplicates to the actual compile-key set (~22-24 keys for a 16k
  token budget, vs. dozens of dummy-run token sizes before).
- Add vllm/model_executor/warmup/jit_warmup_tilelang_helper.py with
  TileLangWarmupTensor, a compile-only fake tensor descriptor (mirrors
  TritonWarmupTensor). compile() calls .compile() on the underlying
  @tilelang.jit kernels, which inspects only tensor metadata and never
  launches the kernel or allocates real GPU memory.
- Slim deepseek_v4_mhc_warmup.py from 354 to 111 lines: the per-kernel
  dispatch / compile-key enumeration / compile logic is now kernel-owned.
  Caller only does model walking + wrapper.warmup(vllm_config).
- Move deepseek_v4_mhc_warmup() call from unconditional execution to
  the enable_jit_warmup branch in kernel_warmup.py, alongside
  sparse_mla_triton_warmup and fa4_cutedsl_warmup.
- Add tests/model_executor/test_mhc_warmup_wrappers.py (CPU-only,
  no GPU/TileLang required) verifying CompileKey fields, dedup behavior,
  dispatch consistency, and compile-only contract.

Co-author: @chungen04
Signed-off-by: hanshuche <shicang@shicang>

Signed-off-by: hanshuche <FlyPanda@leihuang-sketch>
SyaOtiLan pushed a commit to SyaOtiLan/vllm that referenced this pull request Sep 10, 2026
Migrate DeepSeek V4 mHC TileLang kernel warmup to the shared
VllmJitKernel contract (RFC vllm-project#47456 / PR vllm-project#47451), as requested by
@LopezCastroRoberto in PR vllm-project#47807 review.

Key changes:
- Add 3 VllmJitKernel wrappers next to the kernel definitions in
  vllm/model_executor/kernels/mhc/warmup.py (kernel-owned warmup):
  - MhcPreKernel: first-layer path (mhc_pre + mhc_post)
  - MhcFusedPostPreKernel: second-layer-and-after (mhc_fused_post_pre)
  - HcHeadFusedKernel: hc_head_fused_kernel_tilelang op
- Each wrapper exposes CompileKey / dispatch / get_warmup_keys / compile.
  The AST tracer in jit_warmup.py expands WarmupIntRange(1, max_tokens+1)
  and deduplicates to the actual compile-key set (~22-24 keys for a 16k
  token budget, vs. dozens of dummy-run token sizes before).
- Add vllm/model_executor/warmup/jit_warmup_tilelang_helper.py with
  TileLangWarmupTensor, a compile-only fake tensor descriptor (mirrors
  TritonWarmupTensor). compile() calls .compile() on the underlying
  @tilelang.jit kernels, which inspects only tensor metadata and never
  launches the kernel or allocates real GPU memory.
- Slim deepseek_v4_mhc_warmup.py from 354 to 111 lines: the per-kernel
  dispatch / compile-key enumeration / compile logic is now kernel-owned.
  Caller only does model walking + wrapper.warmup(vllm_config).
- Move deepseek_v4_mhc_warmup() call from unconditional execution to
  the enable_jit_warmup branch in kernel_warmup.py, alongside
  sparse_mla_triton_warmup and fa4_cutedsl_warmup.
- Add tests/model_executor/test_mhc_warmup_wrappers.py (CPU-only,
  no GPU/TileLang required) verifying CompileKey fields, dedup behavior,
  dispatch consistency, and compile-only contract.

Co-author: @chungen04
Signed-off-by: hanshuche <shicang@shicang>

Signed-off-by: hanshuche <FlyPanda@leihuang-sketch>
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