[ROCm][CI] Adding qwen3 dp4 eplb - #47480
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Adds the Qwen3-30B-A3B FP8 DP4 async EPLB accuracy job to the ROCm AMD CI pipeline on the 4-GPU MI300 pool. The job runs the existing scheduled integration script with ROCm-specific coverage in test-amd.yaml. The script now disables ROCm MoE padding when ROCm is detected, avoiding the EPLB failure mode seen on AMD. This keeps the change scoped to the Qwen3 DP4 async EPLB path.