Port DeepSeek V4 FlashInfer sparse MLA kernels by PerkzZheng · Pull Request #42316 · vllm-project/vllm

PerkzZheng · 2026-05-11T11:55:15Z

Summary

Rebased DeepSeek V4 FlashInfer sparse MLA branch onto current origin/main.
Keeps the validated Triton indexer-Q path as the default.
Preserves non-PP DeepSeek V4 layer flow while keeping the PP delayed-state path available.
Latest cleanup removes the attempted wrapper-side overlap of _build_flashinfer_mixed_sparse_indices_kernel; FlashInfer sparse-index metadata is now built inside _forward_flashinfer, keeping the stream ownership aligned with the existing FlashMLA overlap pattern.
FlashInfer full-cache path avoids padded Q/output heads and splits decode/prefill FlashInfer calls so prefill launches use only prefill tokens and requests.

Validation

Focused DSV4/FlashInfer pytest: 141 passed, 16 warnings.
Full eval, batch size 256, DeepSeek-V4-Flash, TP=4, BF16 weights, FP8 KV cache:
- Rebased combined repeat: GPQA diamond acc_norm 0.4898989898989899; GSM8K strict 0.9522365428354814; GSM8K flexible 0.9514783927217589.
- Pre-rebase backup combined repeat: GPQA diamond acc_norm 0.47474747474747475; GSM8K strict/flexible 0.9552691432903715.
Local validation notes: eval-results/core-full/rebase_validation_2026-05-11.md.
Latest GPQA run with FlashInfer TRTLLM-gen update, DeepSeek-V4-Flash, TP=4, BF16 weights, kv_cache_dtype=fp8_per_tensor, max_model_len=32768, max_num_batched_tokens=32768, max_num_seqs=128, batch_size=auto: GPQA Diamond CoT zero-shot flexible exact_match 0.7929292929292929 ± 0.028869778460267042; strict exact_match 0.0. FlashInfer commit used for that GPQA run: cba34492b729200ad1982036b2167df8d07688b2.

8k/8k Serving Benchmark

DeepSeek-V4-Flash, TP=4, BF16 weights, max_model_len=32768, max_num_batched_tokens=32768, max_num_seqs=16, concurrency 16, prefix cache disabled, full/piecewise CUDA graph enabled, VLLM_ALLREDUCE_USE_FLASHINFER=0, direct vllm bench serve random dataset, 16 prompts of 8192 input / 8192 output tokens.

For the 8k/8k runs, FlashInfer source was PerkzZheng/flashinfer@136457b891529f25e3ef41c8fc5268ef8bbf34b4; the container's older packaged FlashInfer AOT cache does not include the DSV4 launcher, so the run used JIT from that source checkout.

Backend	KV cache dtype	Duration (s)	Output tok/s	Peak output tok/s	Total tok/s	Mean TTFT (ms)	Mean TPOT (ms)	P99 TPOT (ms)
FlashInfer sparse MLA	`fp8_per_tensor`	206.04	636.15	672.00	1272.30	3386.32	24.73	24.94
FlashMLA sparse	`fp8`	213.20	614.79	656.00	1229.59	6610.01	25.22	25.53

FlashInfer is +3.47% output token throughput vs FlashMLA on this 8k/8k run and has 1.94% lower mean TPOT.

Enabling FlashInfer per-tensor FP8 KV

This path is disabled by default. It is selected only when DeepSeek V4 is run with the explicit per-tensor FP8 KV cache dtype (fp8_per_tensor). Omitting this flag keeps the default BF16/auto KV behavior.

Example CLI:

vllm serve /path/to/DeepSeek-V4-Flash   --tensor-parallel-size 4   --dtype bfloat16   --kv-cache-dtype fp8_per_tensor   --tokenizer-mode deepseek_v4   --trust-remote-code

Example Python:

from vllm import LLM

llm = LLM(
    model="/path/to/DeepSeek-V4-Flash",
    tensor_parallel_size=4,
    dtype="bfloat16",
    kv_cache_dtype="fp8_per_tensor",
    tokenizer_mode="deepseek_v4",
    trust_remote_code=True,
)

For now, this requires a FlashInfer build that includes the DeepSeek V4 sparse MLA kernels. The latest local benchmark used PerkzZheng/flashinfer@136457b891529f25e3ef41c8fc5268ef8bbf34b4.

claude

Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

github-actions · 2026-05-11T11:55:31Z

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gemini-code-assist

Code Review

This pull request introduces support for BF16 and per-tensor FP8 KV cache formats in the DeepSeek V4 sparse MLA implementation, primarily leveraging FlashInfer for the decode path. It adds new Triton kernels for fused Q normalization, RoPE application, and KV cache insertion for full-width caches, alongside infrastructure for managing FlashInfer workspaces and environment variables. Additionally, it refines DeepSeek V4 configuration handling and allows for non-fused post/pre operations in model layers to maintain accuracy. I have no feedback to provide.

mergify · 2026-05-19T16:25:32Z

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @PerkzZheng.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

Signed-off-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com>

mergify · 2026-05-20T06:27:09Z

Documentation preview: https://vllm--42316.org.readthedocs.build/en/42316/

Partial rebase of PR vllm-project#42316 ("Port DeepSeek V4 FlashInfer sparse MLA kernels") onto current upstream/main, after the V4 source tree was moved to vllm/models/deepseek_v4/ (vllm-project#43039/vllm-project#43073/vllm-project#43077/vllm-project#43149) and the fused CUDA insert kernel was restructured (vllm-project#43162/vllm-project#42353). This commit lands the CSRC + low-level plumbing only: - csrc/fused_deepseek_v4_qnorm_rope_kv_insert_kernel.cu: keep upstream's per-slot padded-Q kernel for FlashMLA unchanged; append a sibling fusedDeepseekV4FullCacheKernel<scalar_t_in, STORE_Q_FP8, STORE_KV_FP8> for the FlashInfer V4 path. Writes a contiguous 512-wide K-cache row per token (BF16 or per-tensor FP8 E4M3) with no Q padding. Adds packFp8E4M3x16 helper and BF16 / FP8 launchers. - csrc/ops.h + csrc/torch_bindings.cpp: declare and register two new Torch ops, fused_deepseek_v4_qnorm_rope_kv_rope_full_cache_bf16_insert and fused_deepseek_v4_qnorm_rope_kv_rope_full_cache_fp8_insert. - vllm/config/cache.py: add "fp8_per_tensor" to CacheDType. - vllm/utils/torch_utils.py: map fp8_per_tensor -> torch.float8_e4m3fn. - vllm/v1/attention/backends/registry.py: add V4_FLASHMLA_SPARSE and V4_FLASHINFER_MLA_SPARSE entries so --attention-backend can select the V4 sparse impl explicitly (target classes added later). - docs/design/attention_backends.md: auto-regenerated by the attention-backend-docs pre-commit hook for V4_FLASHMLA_SPARSE. Build: cmake --build --preset release --target install -> exit 0. Smoke test confirms both new ops registered on torch.ops._C. The Python-side wiring (DeepseekV4FlashInferMLASparseImpl, attention.py dispatch, compressor full-cache branch, sparse SWA dtype softening, FlashInfer launcher helpers, kernel warmup, tests, and the _select_v4_sparse_impl refactor that lets the new --attention-backend flag win) follows in later commits. AI assistance: Claude Code (Opus 4.7) drafted the merge mechanically; not yet manually reviewed end-to-end. Do not merge until verified. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

Continues the partial rebase of PR vllm-project#42316 onto upstream/main: adds the Python-side wiring that consumes the full-cache ops registered in the previous commit and routes the new --attention-backend V4_FLASHINFER_MLA_SPARSE selection through the V4 model. - vllm/utils/flashinfer.py: add flashinfer_trtllm_batch_decode_sparse_mla_dsv4 lazy wrapper and flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw hot-path launcher (skips FlashInfer's Python validation). Append to __all__. - vllm/models/deepseek_v4/common/ops/cache_utils.py: port PR's build_flashinfer_mixed_sparse_indices builder + the _build_flashinfer_mixed_sparse_indices_kernel Triton kernel. Exported via common/ops/__init__. - vllm/v1/attention/backends/mla/sparse_swa.py: - Soften DeepseekV4SWACache dtype assertion to accept uint8, bfloat16, and float8_e4m3fn so the FlashInfer V4 layouts can be allocated. Gate the 576B FlashMLA alignment on cache_dtype == "fp8_ds_mla" only. - Add prefill_query_start_loc field to DeepseekSparseSWAMetadata and populate it inside _compute_prefill_metadata_kernel (per-prefill cumulative query offsets, used by the FlashInfer launcher's prefill call). - vllm/models/deepseek_v4/nvidia/flashmla.py: add DeepseekV4FlashInferMLASparseBackend(FlashInferMLASparseBackend) and DeepseekV4FlashInferMLASparseImpl(DeepseekV4SparseMLAAttentionImpl). The Impl mirrors PR's _forward_flashinfer: builds a combined sparse index tensor for the mixed decode+prefill batch, then calls the DSV4 sparse-MLA launcher twice (decode chunk, prefill chunk). Includes a module-level _get_flashinfer_dsv4_workspace cache (128 MB per device). - vllm/models/deepseek_v4/attention.py: - Refactor _select_v4_sparse_impl to accept vllm_config and consult vllm_config.attention_config.backend so --attention-backend V4_FLASHINFER_MLA_SPARSE / V4_FLASHMLA_SPARSE wins over the platform-only default. ROCm and the dtype-implicit FlashMLA default remain unchanged. - Branch the dtype-handling block at construction time: FlashInfer backend accepts auto / bfloat16 / fp8_per_tensor (aliasing fp8/fp8_inc/fp8_e4m3); FlashMLA stays on fp8_ds_mla. - Resolve and cache self.kv_cache_torch_dtype; register _flashinfer_fp8_q_scale / _q_scale_inv / _kv_scale buffers (defaulted to 1.0; checkpoint loading is a follow-up) and stash _flashinfer_fp8_bmm1/2 on the layer for the Impl's _forward to read. - get_kv_cache_spec: derive spec_dtype + alignment from kv_cache_dtype so the FlashInfer contiguous BF16 / per-tensor FP8 layouts allocate without forcing the 576B FlashMLA padding. - DeepseekV4MultiHeadLatentAttentionWrapper._fused_qnorm_rope_kv_insert dispatches on swa_kv_cache.dtype: uint8 -> legacy quant_insert, bfloat16 -> full_cache_bf16_insert (in-place q), float8_e4m3fn -> full_cache_fp8_insert (writes a separately-allocated fp8 q_fp8 and returns it). - docs/design/attention_backends.md: auto-regenerated by the attention-backend-docs pre-commit hook (V4_FLASHINFER_MLA_SPARSE row added). CLI usage: vllm serve /path/to/DeepSeek-V4-Flash \ --tensor-parallel-size 4 --dtype bfloat16 \ --attention-backend V4_FLASHINFER_MLA_SPARSE \ --kv-cache-dtype fp8_per_tensor \ --tokenizer-mode deepseek_v4 --trust-remote-code Verification: - pre-commit run --files <changed> -> all hooks pass (mypy/spdx/ attention-backend-docs included). - pytest tests/kernels/test_fused_deepseek_v4_qnorm_rope_kv_insert.py -> 139 passed in 43s (legacy path unaffected). - Smoke import: AttentionBackendEnum.V4_FLASHINFER_MLA_SPARSE.get_class() resolves to DeepseekV4FlashInferMLASparseBackend with head_sizes=[512] and the expected (num_blocks, block_size, 512) cache shape. Known limitations (follow-ups, not in this commit): - The new full-cache ops have no parity test yet; only the legacy kernel test suite was run. GPQA Diamond eval on DSV4-Flash TP=4 with --kv-cache-dtype fp8_per_tensor is not yet repeated (PR baseline: 0.7929 +/- 0.029). - vllm/models/deepseek_v4/compressor.py is unchanged. The C4A/C128A compressor still writes a UE8M0 paged cache, so compress_ratio > 1 combined with V4_FLASHINFER_MLA_SPARSE is currently unsupported. Pure-SWA (compress_ratio == 1) configurations work end-to-end. - _flashinfer_fp8_{q,kv}_scale buffers default to 1.0. Real scales must come from the checkpoint / quantizer; absent that, FP8 inference accuracy will be off. AI assistance: Claude Code (Opus 4.7) drafted the merge mechanically. Not yet manually reviewed end-to-end; do not merge until GPQA-validated. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

The TRTLLM DSV4 sparse-MLA kernel handles per-request variable q-lens via cum_seq_lens_q, so the decode/prefill split in the previous commit (carried over from PR vllm-project#42316) is a perf choice rather than a correctness requirement. V3.2's FlashInferMLASparseImpl (vllm/v1/attention/backends/mla/flashinfer_mla_sparse.py:315-365) makes a single call for the whole mixed batch; aligning V4 with that pattern. - vllm/models/deepseek_v4/nvidia/flashmla.py: Replace the two-call (decode-then-prefill) invocation in DeepseekV4FlashInferMLASparseImpl._forward with one flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw call. _build_sparse_index_metadata already produces one combined sparse_indices / sparse_topk_lens tensor; query_start_loc spans both phases. max_q_len now reads from the full batch. - vllm/v1/attention/backends/mla/sparse_swa.py: Roll back the prefill_query_start_loc additions (metadata field + extra kernel store). Their sole consumer was the prefill-side branch we just removed, so reverting keeps the diff against upstream/main minimal. No CSRC changes; existing kernel tests still pass. AI assistance: Claude Code (Opus 4.7). Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

Completes the remaining PR vllm-project#42316 ports that were deferred from the backend wiring commits. tests/kernels/test_fused_deepseek_v4_qnorm_rope_kv_insert.py: - Add helpers _full_cache_{fp8,bf16}_op_available, _call_full_cache_{fp8,bf16}_fused, _fp8_full_cache_reference, _bf16_full_cache_reference. - Add test_full_cache_per_tensor_fp8_matches_reference and test_full_cache_bf16_matches_reference parity tests across (num_tokens, n_heads, positions_dtype) parameterizations. References match the kernel's single fp32->bf16 round at the final store. vllm/model_executor/warmup/kernel_warmup.py: - Add deepseek_v4_flashinfer_sparse_mla_warmup(worker) that pre-compiles the _compute_prefill_metadata_kernel and build_flashinfer_mixed_sparse_indices triton kernels at engine init. No-op for non-DSV4 configs and for the FlashMLA backend. Imports adapted to the new vllm.models.deepseek_v4.common.ops path; kernel signature matches the current single-output sparse_swa kernel. - Invoked from kernel_warmup() right after flashinfer_autotune. Verified: pytest tests/kernels/test_fused_deepseek_v4_qnorm_rope_kv_insert.py -> 155 passed (139 legacy + 16 new full-cache parity); pre-commit on changed files passes. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

…ject#42316 Four startup-blocker fixes that fell through the rebase split of the PR's single FlashMLASparseBackend into sibling V4 FlashMLA + V4 FlashInfer backends, plus a launcher-shape revert that restores GSM8K accuracy. 1. SlidingWindowMLASpec.real_page_size_bytes (v1/kv_cache_interface.py): the V4 584B branch is the legacy paged UE8M0 layout -- gate it on `cache_dtype_str == "fp8_ds_mla"`. Contiguous bf16/fp8 SWA caches fall through to `storage_block_size * num_kv_heads * head_size * dtype_size`, matching the MLA spec's existing gating. Without this, `_get_kv_cache_groups_uniform_groups` fails its `max(sm_page_sizes) <= max(all_page_sizes)` assertion at startup. 2. DeepseekV4FlashInferMLASparseBackend.get_supported_kernel_block_sizes returns [256]. Inheriting the V3.2 base's [32, 64] caused `ValueError: No common block size for 256` because the V4 sparse pipeline (compressor + SWA + indexer) uses 256-token blocks. 3. DeepseekV4FlashInferMLASparseBackend.get_builder_cls returns FlashMLASparseMetadataBuilder. The V3.2 FlashInfer builder produces FlashInferMLASparseMetadata which lacks the V4-specific c128a_* topk index fields; both V4 backends share the same sparse-index pipeline and need FlashMLASparseMetadata. 4. _fused_qnorm_rope_kv_insert reads the FP8 scale buffers from `self.mla_attn` (the inner DeepseekV4MLAAttention) not `self` (the wrapper). The wrapper never registered those buffers; the inner attention layer does at __init__. Fixes the `AttributeError: 'DeepseekV4MultiHeadLatentAttentionWrapper' object has no attribute '_flashinfer_fp8_kv_scale'` crash on first fp8 decode, and ensures the SWA insert kernel and the compressor share the same canonical kv_scale tensor. GSM8K parity fix in DeepseekV4FlashInferMLASparseImpl._forward: - Split decode and prefill into two flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw calls (PR vllm-project#42316 pattern). The TRTLLM-GEN sparse-MLA launcher is tuned for uniform-q batches; an earlier single-call collapse for "mixed" decode+prefill batches silently produced wrong outputs (~3 pt GSM8K drop). Decode uses `query_start_loc[:num_decodes+1]` directly; prefill uses `query_start_loc[num_decodes:num_reqs+1] - query_start_loc[num_decodes]` (rebased to 0) since the prefill query view re-anchors at offset 0 inside the sliced tensor. - bmm1_scale / bmm2_scale precomputed at __init__ as Python floats (`self.scale * fp8_q_scale * fp8_kv_scale` and `fp8_kv_scale`), not derived dynamically as 1-elem tensors. The TRTLLM launcher takes scalar scale args -- 1-elem-tensor variants go through a slower / less accurate code path. Mirrors PR exactly; loader wiring will later replace the 1.0 placeholders. Misc cleanup: - Drop the Python-level F.pad in `_fused_qnorm_rope_kv_insert`'s profile branch. FlashMLA Q-pad is owned by the fused CUDA op (fused_deepseek_v4_qnorm_rope_kv_rope_quant_insert); on profile the kernel doesn't fire and mla_attn short-circuits, so we don't need to fake a padded shape in Python. Removes the now-unused `torch.nn.functional as F` import. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

…ncher call GSM8K parity (95) verified with the full mixed batch passed in one flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw call -- the prior two-call split (PR vllm-project#42316 pattern) is no longer needed. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

Partial rebase of PR vllm-project#42316 ("Port DeepSeek V4 FlashInfer sparse MLA kernels") onto current upstream/main, after the V4 source tree was moved to vllm/models/deepseek_v4/ (vllm-project#43039/vllm-project#43073/vllm-project#43077/vllm-project#43149) and the fused CUDA insert kernel was restructured (vllm-project#43162/vllm-project#42353). This commit lands the CSRC + low-level plumbing only: - csrc/fused_deepseek_v4_qnorm_rope_kv_insert_kernel.cu: keep upstream's per-slot padded-Q kernel for FlashMLA unchanged; append a sibling fusedDeepseekV4FullCacheKernel<scalar_t_in, STORE_Q_FP8, STORE_KV_FP8> for the FlashInfer V4 path. Writes a contiguous 512-wide K-cache row per token (BF16 or per-tensor FP8 E4M3) with no Q padding. Adds packFp8E4M3x16 helper and BF16 / FP8 launchers. - csrc/ops.h + csrc/torch_bindings.cpp: declare and register two new Torch ops, fused_deepseek_v4_qnorm_rope_kv_rope_full_cache_bf16_insert and fused_deepseek_v4_qnorm_rope_kv_rope_full_cache_fp8_insert. - vllm/config/cache.py: add "fp8_per_tensor" to CacheDType. - vllm/utils/torch_utils.py: map fp8_per_tensor -> torch.float8_e4m3fn. - vllm/v1/attention/backends/registry.py: add V4_FLASHMLA_SPARSE and V4_FLASHINFER_MLA_SPARSE entries so --attention-backend can select the V4 sparse impl explicitly (target classes added later). - docs/design/attention_backends.md: auto-regenerated by the attention-backend-docs pre-commit hook for V4_FLASHMLA_SPARSE. Build: cmake --build --preset release --target install -> exit 0. Smoke test confirms both new ops registered on torch.ops._C. The Python-side wiring (DeepseekV4FlashInferMLASparseImpl, attention.py dispatch, compressor full-cache branch, sparse SWA dtype softening, FlashInfer launcher helpers, kernel warmup, tests, and the _select_v4_sparse_impl refactor that lets the new --attention-backend flag win) follows in later commits. AI assistance: Claude Code (Opus 4.7) drafted the merge mechanically; not yet manually reviewed end-to-end. Do not merge until verified. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

Continues the partial rebase of PR vllm-project#42316 onto upstream/main: adds the Python-side wiring that consumes the full-cache ops registered in the previous commit and routes the new --attention-backend V4_FLASHINFER_MLA_SPARSE selection through the V4 model. - vllm/utils/flashinfer.py: add flashinfer_trtllm_batch_decode_sparse_mla_dsv4 lazy wrapper and flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw hot-path launcher (skips FlashInfer's Python validation). Append to __all__. - vllm/models/deepseek_v4/common/ops/cache_utils.py: port PR's build_flashinfer_mixed_sparse_indices builder + the _build_flashinfer_mixed_sparse_indices_kernel Triton kernel. Exported via common/ops/__init__. - vllm/v1/attention/backends/mla/sparse_swa.py: - Soften DeepseekV4SWACache dtype assertion to accept uint8, bfloat16, and float8_e4m3fn so the FlashInfer V4 layouts can be allocated. Gate the 576B FlashMLA alignment on cache_dtype == "fp8_ds_mla" only. - Add prefill_query_start_loc field to DeepseekSparseSWAMetadata and populate it inside _compute_prefill_metadata_kernel (per-prefill cumulative query offsets, used by the FlashInfer launcher's prefill call). - vllm/models/deepseek_v4/nvidia/flashmla.py: add DeepseekV4FlashInferMLASparseBackend(FlashInferMLASparseBackend) and DeepseekV4FlashInferMLASparseImpl(DeepseekV4SparseMLAAttentionImpl). The Impl mirrors PR's _forward_flashinfer: builds a combined sparse index tensor for the mixed decode+prefill batch, then calls the DSV4 sparse-MLA launcher twice (decode chunk, prefill chunk). Includes a module-level _get_flashinfer_dsv4_workspace cache (128 MB per device). - vllm/models/deepseek_v4/attention.py: - Refactor _select_v4_sparse_impl to accept vllm_config and consult vllm_config.attention_config.backend so --attention-backend V4_FLASHINFER_MLA_SPARSE / V4_FLASHMLA_SPARSE wins over the platform-only default. ROCm and the dtype-implicit FlashMLA default remain unchanged. - Branch the dtype-handling block at construction time: FlashInfer backend accepts auto / bfloat16 / fp8_per_tensor (aliasing fp8/fp8_inc/fp8_e4m3); FlashMLA stays on fp8_ds_mla. - Resolve and cache self.kv_cache_torch_dtype; register _flashinfer_fp8_q_scale / _q_scale_inv / _kv_scale buffers (defaulted to 1.0; checkpoint loading is a follow-up) and stash _flashinfer_fp8_bmm1/2 on the layer for the Impl's _forward to read. - get_kv_cache_spec: derive spec_dtype + alignment from kv_cache_dtype so the FlashInfer contiguous BF16 / per-tensor FP8 layouts allocate without forcing the 576B FlashMLA padding. - DeepseekV4MultiHeadLatentAttentionWrapper._fused_qnorm_rope_kv_insert dispatches on swa_kv_cache.dtype: uint8 -> legacy quant_insert, bfloat16 -> full_cache_bf16_insert (in-place q), float8_e4m3fn -> full_cache_fp8_insert (writes a separately-allocated fp8 q_fp8 and returns it). - docs/design/attention_backends.md: auto-regenerated by the attention-backend-docs pre-commit hook (V4_FLASHINFER_MLA_SPARSE row added). CLI usage: vllm serve /path/to/DeepSeek-V4-Flash \ --tensor-parallel-size 4 --dtype bfloat16 \ --attention-backend V4_FLASHINFER_MLA_SPARSE \ --kv-cache-dtype fp8_per_tensor \ --tokenizer-mode deepseek_v4 --trust-remote-code Verification: - pre-commit run --files <changed> -> all hooks pass (mypy/spdx/ attention-backend-docs included). - pytest tests/kernels/test_fused_deepseek_v4_qnorm_rope_kv_insert.py -> 139 passed in 43s (legacy path unaffected). - Smoke import: AttentionBackendEnum.V4_FLASHINFER_MLA_SPARSE.get_class() resolves to DeepseekV4FlashInferMLASparseBackend with head_sizes=[512] and the expected (num_blocks, block_size, 512) cache shape. Known limitations (follow-ups, not in this commit): - The new full-cache ops have no parity test yet; only the legacy kernel test suite was run. GPQA Diamond eval on DSV4-Flash TP=4 with --kv-cache-dtype fp8_per_tensor is not yet repeated (PR baseline: 0.7929 +/- 0.029). - vllm/models/deepseek_v4/compressor.py is unchanged. The C4A/C128A compressor still writes a UE8M0 paged cache, so compress_ratio > 1 combined with V4_FLASHINFER_MLA_SPARSE is currently unsupported. Pure-SWA (compress_ratio == 1) configurations work end-to-end. - _flashinfer_fp8_{q,kv}_scale buffers default to 1.0. Real scales must come from the checkpoint / quantizer; absent that, FP8 inference accuracy will be off. AI assistance: Claude Code (Opus 4.7) drafted the merge mechanically. Not yet manually reviewed end-to-end; do not merge until GPQA-validated. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

The TRTLLM DSV4 sparse-MLA kernel handles per-request variable q-lens via cum_seq_lens_q, so the decode/prefill split in the previous commit (carried over from PR vllm-project#42316) is a perf choice rather than a correctness requirement. V3.2's FlashInferMLASparseImpl (vllm/v1/attention/backends/mla/flashinfer_mla_sparse.py:315-365) makes a single call for the whole mixed batch; aligning V4 with that pattern. - vllm/models/deepseek_v4/nvidia/flashmla.py: Replace the two-call (decode-then-prefill) invocation in DeepseekV4FlashInferMLASparseImpl._forward with one flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw call. _build_sparse_index_metadata already produces one combined sparse_indices / sparse_topk_lens tensor; query_start_loc spans both phases. max_q_len now reads from the full batch. - vllm/v1/attention/backends/mla/sparse_swa.py: Roll back the prefill_query_start_loc additions (metadata field + extra kernel store). Their sole consumer was the prefill-side branch we just removed, so reverting keeps the diff against upstream/main minimal. No CSRC changes; existing kernel tests still pass. AI assistance: Claude Code (Opus 4.7). Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

Completes the remaining PR vllm-project#42316 ports that were deferred from the backend wiring commits. tests/kernels/test_fused_deepseek_v4_qnorm_rope_kv_insert.py: - Add helpers _full_cache_{fp8,bf16}_op_available, _call_full_cache_{fp8,bf16}_fused, _fp8_full_cache_reference, _bf16_full_cache_reference. - Add test_full_cache_per_tensor_fp8_matches_reference and test_full_cache_bf16_matches_reference parity tests across (num_tokens, n_heads, positions_dtype) parameterizations. References match the kernel's single fp32->bf16 round at the final store. vllm/model_executor/warmup/kernel_warmup.py: - Add deepseek_v4_flashinfer_sparse_mla_warmup(worker) that pre-compiles the _compute_prefill_metadata_kernel and build_flashinfer_mixed_sparse_indices triton kernels at engine init. No-op for non-DSV4 configs and for the FlashMLA backend. Imports adapted to the new vllm.models.deepseek_v4.common.ops path; kernel signature matches the current single-output sparse_swa kernel. - Invoked from kernel_warmup() right after flashinfer_autotune. Verified: pytest tests/kernels/test_fused_deepseek_v4_qnorm_rope_kv_insert.py -> 155 passed (139 legacy + 16 new full-cache parity); pre-commit on changed files passes. Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

…ject#42316 Four startup-blocker fixes that fell through the rebase split of the PR's single FlashMLASparseBackend into sibling V4 FlashMLA + V4 FlashInfer backends, plus a launcher-shape revert that restores GSM8K accuracy. 1. SlidingWindowMLASpec.real_page_size_bytes (v1/kv_cache_interface.py): the V4 584B branch is the legacy paged UE8M0 layout -- gate it on `cache_dtype_str == "fp8_ds_mla"`. Contiguous bf16/fp8 SWA caches fall through to `storage_block_size * num_kv_heads * head_size * dtype_size`, matching the MLA spec's existing gating. Without this, `_get_kv_cache_groups_uniform_groups` fails its `max(sm_page_sizes) <= max(all_page_sizes)` assertion at startup. 2. DeepseekV4FlashInferMLASparseBackend.get_supported_kernel_block_sizes returns [256]. Inheriting the V3.2 base's [32, 64] caused `ValueError: No common block size for 256` because the V4 sparse pipeline (compressor + SWA + indexer) uses 256-token blocks. 3. DeepseekV4FlashInferMLASparseBackend.get_builder_cls returns FlashMLASparseMetadataBuilder. The V3.2 FlashInfer builder produces FlashInferMLASparseMetadata which lacks the V4-specific c128a_* topk index fields; both V4 backends share the same sparse-index pipeline and need FlashMLASparseMetadata. 4. _fused_qnorm_rope_kv_insert reads the FP8 scale buffers from `self.mla_attn` (the inner DeepseekV4MLAAttention) not `self` (the wrapper). The wrapper never registered those buffers; the inner attention layer does at __init__. Fixes the `AttributeError: 'DeepseekV4MultiHeadLatentAttentionWrapper' object has no attribute '_flashinfer_fp8_kv_scale'` crash on first fp8 decode, and ensures the SWA insert kernel and the compressor share the same canonical kv_scale tensor. GSM8K parity fix in DeepseekV4FlashInferMLASparseImpl._forward: - Split decode and prefill into two flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw calls (PR vllm-project#42316 pattern). The TRTLLM-GEN sparse-MLA launcher is tuned for uniform-q batches; an earlier single-call collapse for "mixed" decode+prefill batches silently produced wrong outputs (~3 pt GSM8K drop). Decode uses `query_start_loc[:num_decodes+1]` directly; prefill uses `query_start_loc[num_decodes:num_reqs+1] - query_start_loc[num_decodes]` (rebased to 0) since the prefill query view re-anchors at offset 0 inside the sliced tensor. - bmm1_scale / bmm2_scale precomputed at __init__ as Python floats (`self.scale * fp8_q_scale * fp8_kv_scale` and `fp8_kv_scale`), not derived dynamically as 1-elem tensors. The TRTLLM launcher takes scalar scale args -- 1-elem-tensor variants go through a slower / less accurate code path. Mirrors PR exactly; loader wiring will later replace the 1.0 placeholders. Misc cleanup: - Drop the Python-level F.pad in `_fused_qnorm_rope_kv_insert`'s profile branch. FlashMLA Q-pad is owned by the fused CUDA op (fused_deepseek_v4_qnorm_rope_kv_rope_quant_insert); on profile the kernel doesn't fire and mla_attn short-circuits, so we don't need to fake a padded shape in Python. Removes the now-unused `torch.nn.functional as F` import. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

…ncher call GSM8K parity (95) verified with the full mixed batch passed in one flashinfer_trtllm_batch_decode_sparse_mla_dsv4_raw call -- the prior two-call split (PR vllm-project#42316 pattern) is no longer needed. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

Fresh re-port of PerkzZheng's vllm-project#42316 onto the restructured vllm/models/deepseek_v4/ tree, exposing a selectable `--attention-backend FLASHINFER_MLA_SPARSE_V4` for DeepSeek V4 alongside the FlashMLA V4 path. - csrc: sibling fusedDeepseekV4FullCacheKernel writing a contiguous 512-wide bf16 / per-tensor fp8 KV row (no Q padding), plus fused_deepseek_v4_qnorm_rope_kv_rope_full_cache_{bf16,fp8}_insert ops. - nvidia/flashinfer_sparse.py: backend (reuses the FlashMLA V4 metadata/builder) + impl. Calls the public flashinfer.mla.trtllm_batch_decode_sparse_mla_dsv4 launcher and keeps the two-call decode/prefill split (prefill cum_seq_lens_q rebased to 0). Pads q heads to {64,128} as required by the TRTLLM-gen kernel. - registry: FLASHINFER/FLASHMLA/ROCM_*_V4 enums. - attention.py: backend-aware _select_v4_sparse_impl, _resolve_dsv4_kv_cache_dtype, init_layer_buffers hook, dtype-branched fused-insert dispatch. - compressor: head=512 full-cache writes routed through Triton (STORE_FULL_KV/FP8); page-size alignment gated on fp8_ds_mla. - build_flashinfer_mixed_sparse_indices in common/ops; FlashInfer sparse MLA kernel warmup; full-cache parity tests. Verified: cmake build OK; test_fused_deepseek_v4_qnorm_rope_kv_insert.py 155 passed (16 new full-cache parity), test_compressor_kv_cache.py 32 passed; ruff/mypy/attention-backend-docs clean. AI assistance: Claude Code (Opus 4.8). Not yet GPQA/GSM8K-validated e2e. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>

PerkzZheng requested review from ApostaC, WoosukKwon, alexm-redhat, heheda12345, mgoin, njhill, orozery, pavanimajety, robertgshaw2-redhat, tlrmchlsmth, yewentao256, ywang96 and zyongye as code owners May 11, 2026 11:55

claude Bot reviewed May 11, 2026

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mergify Bot added deepseek Related to DeepSeek models nvidia labels May 11, 2026

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PerkzZheng added 10 commits May 11, 2026 18:55

Port DeepSeek V4 FlashInfer sparse MLA

0fb4233

Optimize DeepSeek V4 FlashInfer decode

6d0ccbd

Fix DeepSeek V4 FlashInfer FP8 cache scaling

1e2a685

Optimize DeepSeek V4 FlashInfer FP8 decode quantization

32934d1

Optimize DeepSeek V4 FlashInfer FP8 sparse MLA

53fe443

Use one FlashInfer call for mixed DSV4 FP8 batches

cc5ec7b

Unify DeepSeek V4 FlashInfer attention path

db6aff8

Clean up DeepSeek V4 FlashInfer FP8 path

377fa2b

Fix DeepSeek V4 post-rebase test coverage

9c8f3b0

Preserve DeepSeek V4 Flash accuracy after rebase

706e92d

PerkzZheng requested review from ProExpertProg, hmellor and houseroad as code owners May 19, 2026 16:22

mergify Bot added the needs-rebase label May 19, 2026

PerkzZheng added 3 commits May 19, 2026 23:13

Allow async scheduling for DeepSeek V4

b58aafe

Signed-off-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com>

Fix sparse MLA pre-commit issues

27b39dd

Signed-off-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com>

Restore DeepSeek V4 slot mapping test to main

60a4b22

Signed-off-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com>

mergify Bot added the documentation Improvements or additions to documentation label May 20, 2026

root and others added 4 commits May 20, 2026 21:19

Use CUDA full-cache FP8 insert for DeepSeek V4

057dcc0

Call DeepSeek V4 full-cache FP8 op directly

c6dc5d2

Restore vLLM config from PR base

ddbbdc3

Use CUDA fused insert for full KV cache

8f0603b

zyongye mentioned this pull request May 28, 2026

[DSv4] Adding TRTLLM gen attention kernel #43827

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Port DeepSeek V4 FlashInfer sparse MLA kernels#42316

Port DeepSeek V4 FlashInfer sparse MLA kernels#42316
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Enabling FlashInfer per-tensor FP8 KV

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