Fix Gemma4 KV cache page-size alignment for per-token-head quantization

[lisp19]

Purpose

Fix Gemma4 initialization failure in V1 when per-token-head KV cache quantization is enabled (int8_per_token_head / fp8_per_token_head), as reported in #40388.

Root cause: Gemma4 hybrid attention mixes local (head_dim=256) and global (head_dim=512) layers. With per-token-head KV quantization, per-token scale metadata changes page-size factors to:

• local: (256 * 1) * 2 + 8 = 520
• global: (512 * 1) * 2 + 8 = 1032
  1032 is not divisible by 520, so V1 page-size unification can fail.

Additionally, when page_size_padded is present, block-size scaling and KV cache shape reconstruction paths needed consistent padded-size handling.

Fix:

The original fix addressed Gemma4 hybrid attention’s page-size mismatch by padding the global per-token-head KV page factor to a 1040-based value so hybrid page-size unification succeeds.
On current upstream, that spec-level padding and block-size propagation are already in place, so this PR adapts the fix to the latest runtime layout path. In particular, for standard attention we restore page_size_padded as a logical KV shape adjustment rather than a stride-only as_strided(...) interpretation, which is required by Triton’s per-token-head quantized KV layout. To do that, this PR adds a small helper to scale padded page size for kernel_block_size and recompute the KV cache final dimension, and applies it in:

• vllm/v1/worker/gpu/attn_utils.py
• vllm/v1/worker/gpu_model_runner.py

Original change plan:

• Add AttentionSpec.copy_with_new_block_size handling to correctly scale and validate page_size_padded when block size changes.
• In Gemma4, set kv_cache_page_size_padded for global-attention layers (1040-based padded factor) under per-token-head cache dtypes, and propagate this through Attention KV spec construction.
• Add shared helper adjust_kv_cache_shape_for_padded_page_size and use it consistently in:
• vllm/v1/worker/gpu/attn_utils.py
• vllm/v1/worker/gpu_model_runner.py
• vllm/v1/worker/kv_connector_model_runner_mixin.py

Fixes issue #40388.

Test Plan

Runtime reproduction for issue validation on Gemma4 environment:

vllm serve <gemma4-model> --kv_cache_dtype int8_per_token_head

Because this change was tested on Turing hardware, #39018 should be merged first before this PR.

Test Results

(APIServer pid=1) INFO:     Started server process [1]
(APIServer pid=1) INFO:     Waiting for application startup.
(APIServer pid=1) INFO:     Application startup complete.
(APIServer pid=1) INFO:     172.17.0.1:33874 - "GET /v1/models HTTP/1.1" 200 OK
(APIServer pid=1) INFO:     172.17.0.1:33890 - "POST /v1/chat/completions HTTP/1.1" 200 OK
(APIServer pid=1) INFO 04-30 18:05:40 [loggers.py:271] Engine 000: Avg prompt throughput: 2.4 tokens/s, Avg generation throughput: 10.4 tokens/s, Running: 0 reqs, Waiting: 0 reqs, GPU KV cache usage: 0.0%, Prefix cache hit rate: 0.0%
(APIServer pid=1) INFO 04-30 18:05:50 [loggers.py:271] Engine 000: Avg prompt throughput: 0.0 tokens/s, Avg generation throughput: 0.0 tokens/s, Running: 0 reqs, Waiting: 0 reqs, GPU KV cache usage: 0.0%, Prefix cache hit rate: 0.0%

As a relatively new contributor in this area, I truly appreciate detailed review comments and suggestions, and I will actively iterate on this PR based on feedback. Plz let me know if there are any questions on this change.

---

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[claude]

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[gemini-code-assist]

Code Review

This pull request introduces support for padded KV cache page sizes, primarily to accommodate Gemma4's hybrid attention layers when using per-token-head quantization. It adds a utility function, adjust_kv_cache_shape_for_padded_page_size, to handle the necessary shape adjustments and updates AttentionSpec to support scaling of padded page sizes during block size unification. The review feedback identifies duplicated logic for adjusting padded_page_size_bytes across gpu_model_runner.py and kv_connector_model_runner_mixin.py, suggesting that this logic be extracted into a shared helper function within kv_cache_shape_utils.py to improve maintainability.

[cferra]

Independent confirmation on sm_120 (Blackwell consumer) at TP=4 — this PR fixes the long-standing Gemma 4 FP8 garbage bug.

Hardware/software:

• 4× RTX 5060 Ti (Blackwell consumer, sm_120), CUDA 13.2, Ubuntu 25.10
• vLLM 0.19.2rc1.dev156+gcbb515321.cu132 = vLLM main + JartX/#39931 (feature/hybrid_turboquant) + this PR
• Gemma 4 31B FP8 (compressed-tensors FP8 block weights)
• --kv-cache-dtype fp8_per_token_head --tensor-parallel-size 4

Without this PR: engine init fails at the exact error described in your PR body —

NotImplementedError: The page size of the layer is not divisible by the
maximum page size. Cannot unify by adjusting block_size.

with local=520, global=1032 page sizes (matching the (256·2+8) / (512·2+8) math).

With this PR applied: engine starts cleanly, runs end-to-end:

Config	Value
--max-model-len	196,608 (192k)
--gpu-memory-utilization	0.97
VRAM per card	15.5 GB / 16 GB
GPU KV cache budget	19,328 tokens
Generation throughput	34.46 tok/s (471-token creative prose)
Prefill throughput	~1,317 tok/s (3,425-token prompt)
Hardware ceiling observed	~201k at gpu-util 0.97; native 262k doesn't fit 4× 16 GB

Coherence probes (all finish_reason=stop, no garbage):

• "What is 17 × 23?" → "17 times 23 is 391."
• 471-token short story, Elias the lighthouse keeper — full narrative arc with proper ending
• 664-token technical explainer of transformer attention (self-attention, multi-head, KV caching) — structured with headers and summary
• 3,425-token prompt → correct one-sentence summary

This is the first coherent output we've ever gotten from Gemma 4 31B FP8 at TP≥3 after ~two months of debugging. Our 2026-04-12 root-cause write-up on #39407 narrowed it to "hidden states match HF transformers at layer 0 but diverge to 29× by layer 59 through the attention path, error compounds per-layer" — which is what this PR's per-token-head page-size handling unblocks once you also use --kv-cache-dtype fp8_per_token_head. The default auto/fp8 KV paths on current main still produce the old "C391S single single single single de..." garbage. Switching to fp8_per_token_head with this PR is what delivers the coherent output.

Also fixes (observed the same root cause symptom on): #39914, #39049, #39133.

Separate compat gap worth a follow-up (not for this PR): TurboQuant KV dtypes (turboquant_k8v4, turboquant_3bit_nc, etc.) still fail with

ValueError: Selected backend AttentionBackendEnum.TRITON_ATTN is not valid
for this configuration. Reason: ['kv_cache_dtype not supported']

because Gemma 4's hybrid head_dim auto-forces TRITON_ATTN (by this logic) and TRITON_ATTN hasn't been extended to accept turboquant_*. JartX's #39931 removes the engine-init guard and handles the spec unification, but TRITON_ATTN compat is the last mile. Probably worth a follow-up PR.

LGTM from my side — would love to see this merged. Happy to run additional reproductions on the Blackwell setup if useful.

cc @lucianommartins @mgoin @WoosukKwon (have engaged on various related threads)

[lisp19]

Independent confirmation on sm_120 (Blackwell consumer) at TP=4 — this PR fixes the long-standing Gemma 4 FP8 garbage bug.

Hardware/software:

• 4× RTX 5060 Ti (Blackwell consumer, sm_120), CUDA 13.2, Ubuntu 25.10
• vLLM 0.19.2rc1.dev156+gcbb515321.cu132 = vLLM main + JartX/#39931 (feature/hybrid_turboquant) + this PR
• Gemma 4 31B FP8 (compressed-tensors FP8 block weights)
• --kv-cache-dtype fp8_per_token_head --tensor-parallel-size 4

Without this PR: engine init fails at the exact error described in your PR body —

NotImplementedError: The page size of the layer is not divisible by the
maximum page size. Cannot unify by adjusting block_size.

with local=520, global=1032 page sizes (matching the (256·2+8) / (512·2+8) math).

With this PR applied: engine starts cleanly, runs end-to-end:

Config Value
--max-model-len 196,608 (192k)
--gpu-memory-utilization 0.97
VRAM per card 15.5 GB / 16 GB
GPU KV cache budget 19,328 tokens
Generation throughput 34.46 tok/s (471-token creative prose)
Prefill throughput ~1,317 tok/s (3,425-token prompt)
Hardware ceiling observed ~201k at gpu-util 0.97; native 262k doesn't fit 4× 16 GB
Coherence probes (all finish_reason=stop, no garbage):

• "What is 17 × 23?" → "17 times 23 is 391."
• 471-token short story, Elias the lighthouse keeper — full narrative arc with proper ending
• 664-token technical explainer of transformer attention (self-attention, multi-head, KV caching) — structured with headers and summary
• 3,425-token prompt → correct one-sentence summary

This is the first coherent output we've ever gotten from Gemma 4 31B FP8 at TP≥3 after ~two months of debugging. Our 2026-04-12 root-cause write-up on #39407 narrowed it to "hidden states match HF transformers at layer 0 but diverge to 29× by layer 59 through the attention path, error compounds per-layer" — which is what this PR's per-token-head page-size handling unblocks once you also use --kv-cache-dtype fp8_per_token_head. The default auto/fp8 KV paths on current main still produce the old "C391S single single single single de..." garbage. Switching to fp8_per_token_head with this PR is what delivers the coherent output.

Also fixes (observed the same root cause symptom on): #39914, #39049, #39133.

Separate compat gap worth a follow-up (not for this PR): TurboQuant KV dtypes (turboquant_k8v4, turboquant_3bit_nc, etc.) still fail with

ValueError: Selected backend AttentionBackendEnum.TRITON_ATTN is not valid
for this configuration. Reason: ['kv_cache_dtype not supported']

because Gemma 4's hybrid head_dim auto-forces TRITON_ATTN (by this logic) and TRITON_ATTN hasn't been extended to accept turboquant_*. JartX's #39931 removes the engine-init guard and handles the spec unification, but TRITON_ATTN compat is the last mile. Probably worth a follow-up PR.

LGTM from my side — would love to see this merged. Happy to run additional reproductions on the Blackwell setup if useful.

cc @lucianommartins @mgoin @WoosukKwon (have engaged on various related threads)

Hi, thanks a lot for the confirmation and detailed Blackwell validation — this is very helpful. @cferra
Since the main branch has changed quite a bit since the original version of this PR, the old implementation now has fairly large conflicts with the current KV/runtime layout code, so I reworked the fix against the latest main instead of carrying the earlier patch forward directly. The new version keeps the same goal, but is adapted to the current architecture; if useful, please refer to the latest implementation in this PR, and the earlier history/commits for the original approach. Please note that since the focus of the new implementation has shifted slightly, it might not directly map to the specific issue you encountered earlier. I'm happy to help look into it further if you need any additional information from my side.

[cferra]

@lisp19 Re-validated against the rework — the new implementation still fixes the bug for our setup. Thanks for the heads-up that the focus might have shifted; happy to confirm it didn't.

What I tested:

• Pulled HEAD c74e90b9 (the new revision with [Bugfix] Restore Gemma4 Triton KV padding semantics + [Bugfix] Fix Gemma4 hybrid KV page size alignment on top of merged main)
• Same blackwell-ai box: 4× RTX 5060 Ti (sm_120), CUDA 13.2
• Same Gemma 4 31B FP8 (compressed-tensors block-quantized)
• Same flags: --kv-cache-dtype fp8_per_token_head --tensor-parallel-size 4
• Note: I dropped JartX's feature/hybrid_turboquant from this build — the rework's HEAD applies cleanly on top of current main without it. So this is origin/main + this PR only.

Result: vllm 0.20.1rc1.dev119+gc74e90b9e engine starts cleanly, all 4 probes pass finish=stop:

Probe	Output	Speed
What is 17 × 23?	391 (correct)	—
238-token lighthouse short story	full narrative, original "Elias of Blackwood Rock" arc	34.54 tok/s
265-token transformer self-attention explainer	coherent technical, multi-head wrap-up	34.56 tok/s
Planet list	correct order, Mercury → Neptune bolded	34.01 tok/s

Same throughput as the original PR revision I tested on 2026-04-24 (also 34.5 tok/s on the same hardware). No regression in correctness or perf from the rebase to current main.

The rework still resolves the original "C391S single single single single de..." garbage for #39407 and the related issues I cross-referenced.

Diff stats also worth noting: rework is 229+/38 across 8 files vs the prior 306+/19 across 10 files. Cleaner implementation, same effect.

LGTM on the rework. Hope this helps the merge along — happy to run additional configs if useful.

[noonghunna]

Cross-rig validation finding from Ampere consumer + structural confirmation that the worker-only shortcut is insufficient.

Hardware/software (the rig that validated this finding):

• 2× RTX 3090 PCIe (Ampere consumer, sm_86), no NVLink
• vLLM nightly nightly-e47c98ef7a38792996e452ef53914e21e41928e9 + PR #41745 overlay (Gemma 4 MTP, merged 2026-05-06)
• Gemma 4 31B AutoRound INT4 target + Google MTP drafter (google/gemma-4-31B-it-assistant)
• Target: --kv-cache-dtype int8_per_token_head + TP=2 + 131K max-model-len

We hit the same unify_kv_cache_spec_page_size NotImplementedError. Before applying this PR end-to-end (deferred — the model/attention spec changes here intersect with our PR #41745 Gemma 4 MTP overlay, and we'd want to test the merged form once #41745 is in a nightly tag), we explored two alternative fix shapes to understand the structural problem. Both failure modes confirm this PR's design choices are correct.

Documented in full at our local memo: perheadkv-overlay-comparison.md.

Alternative 1 — generic spec-level fix at kv_cache_utils.py only

Implemented by ChatGPT/Codex: relax the strict-divisibility check in unify_kv_cache_spec_page_size to fall back to page_size_padded for non-divisible cases (LCM-based fallback). No model or attention spec changes.

Result: boots cleanly with Available KV cache memory: 11.45 GiB, GPU KV cache size: 247,186 tokens on Gemma 4 31B + int8_per_token_head TP=2 (vs 57,668 tokens at bf16 — 4.3× growth). Functional smoke (Paris, tool calls, streaming, MTP acceptance length matching bf16) all passed.

But: severe decode-TPS decay on multi-turn workloads. Measured turn-1 33 TPS → turn-5 10 TPS over a 5-turn accumulating-context session, 30% retention. Root cause is structural: with page_size_padded set, vLLM's generic strided-view path uses block index as the first physical dimension. The source code comment in kv_cache_utils.py explicitly notes this is wrong for standard attention backends whose tensor shape starts with a K/V dimension.

This is exactly what your PR fixes — switching standard attention to a padded logical last-dim view instead of the generic block-stride view. The TPS decay we observed on the alternative confirms why your worker-runtime change is necessary, not just a polish step.

Alternative 2 — your worker-runtime change, applied alone

Tried: extracting just vllm/v1/worker/{gpu/attn_utils.py, gpu_model_runner.py} from this PR and overlaying onto current main.

Result: fails at the original strict unifier — NotImplementedError: The page size of the layer is not divisible by the maximum page size. The worker-side logical-shape view depends on the spec-level pre-padding (1040-byte factor for Gemma 4 global per-token-head layers) being in place. Worker-only overlay is structurally insufficient.

Alternative 3 — hybrid (generic unifier + your worker view)

Tried: rebasing your worker-runtime logical-shape logic onto Codex's generic unifier (Alternative 1's kv_cache_utils.py).

Result: boots without the page-size error, but a basic "capital of France" smoke test returns corrupted output:

The capital1edistist de// deimon-,/,，,/ or, l/List or or orP,P orP

Confirms that the worker-runtime view's switch to padded logical last-dim is not portable to a generic-padding-anywhere unifier — your PR's spec-level pre-padding to 1040-byte factor at specific Gemma 4 global layers is part of the contract the worker view depends on.

Net

Each alternative we tried fails in a way that confirms a specific design choice in this PR:

• Generic unifier without spec changes → wrong logical view → TPS decay
• Worker view without spec changes → strict unifier rejects → no boot
• Generic unifier + worker view (no spec changes) → boots but corrupts → misalignment between unifier and worker view

So this PR's "model + attention spec + worker-runtime view together" packaging is the minimum viable fix, not over-scoping. From a cross-rig Ampere-consumer + INT8 perspective, this is the correct upstream path.

Joins prior validation

Adds Ampere consumer + INT8 per-token-head as a third validation alongside @cferra's Blackwell consumer (4× RTX 5060 Ti, sm_120) + fp8_per_token_head prior data point.

We'll run the full PR end-to-end (including the model/attention spec changes) once it lands in a nightly tag and rebuilds against the merged gemma4_mtp model class, then post bench/soak numbers back here. Tracking on our side at docs/UPSTREAM.md.

[noonghunna]

Cross-rig validation update — Ampere consumer (sm_86), INT8 PTH path

Following up on my 2026-05-06 comment where I'd flagged the worker-only overlay didn't ship clean. The full PR + post-#41745 merge resolution does land cleanly on Ampere consumer with int8_per_token_head KV.

Hardware / software

• 2× RTX 3090 (Ampere consumer, sm_86), CUDA 13.0, Ubuntu 22.04, vLLM nightly 1acd67a795... (post-[Spec Decode] Add Gemma4 MTP speculative decoding support #41745 merge, 2026-05-08)
• Local rebase of this PR onto current main — single conflict in vllm/v1/worker/gpu/attn_utils.py:_reshape_kv_cache (combined main's hybrid attn/mamba dispatch with this PR's MLA-vs-standard-attention split for page_size_padded). Diff in our overlay tree at models/gemma-4-31b/vllm/patches/vllm-pr40391-rebased/
• Gemma 4 31B Intel AutoRound INT4 weights + Google Gemma 4 MTP "assistant" drafter (PR [Spec Decode] Add Gemma4 MTP speculative decoding support #41745 path)
• --kv-cache-dtype int8_per_token_head --tensor-parallel-size 2

Why INT8 PTH on Ampere instead of FP8 PTH

fp8_per_token_head boots fail on sm_86 with ValueError: type fp8e4nv not supported in this architecture. The supported fp8 dtypes are ('fp8e4b15', 'fp8e5'). The Triton kernel for FP8 PTH storage uses fp8e4nv which is Ada/Blackwell-only — Ampere supports only fp8e4b15 and fp8e5. int8_per_token_head dispatches to standard torch.int8 ops which work on sm_86. So:

• sm_86 (us): INT8 PTH ✅, FP8 PTH ❌
• sm_120 (cferra): both INT8 PTH and FP8 PTH ✅

Either way, this PR fixes the underlying page-size mismatch which is what unblocks the family. The dtype choice within the family is downstream of this fix.

Validation chain (all PASSED on dual 3090 Ampere)

Stage	Config	Result
Boot	TP=2, INT8 PTH, max_model_len=98K, max-num-seqs=4	✅ KV pool 354K tokens, 3.6× concurrency
Bench	Canonical narr+code	✅ 96.16 / 127.11 wall TPS, AL up to 3.94
verify-stress	Including 91K Cliff-2-territory needle	✅ 7/7 PASS (10K/30K/60K/91K needles all recalled correctly, tool prefill OK, multi-turn agent OK, reasoning-heavy OK, LCB-coding OK)
262K boot	TP=2, INT8 PTH, max_model_len=262144, max-num-seqs=1	✅ KV pool 455K tokens, 1.74× concurrency at full 262K (Gemma 4's native max_position_embeddings)
262K bench	Canonical	✅ 95.27 / 125.93 TPS — per-token TPS preserved at full max_model_len
262K verify-stress	Same 7-check chain	✅ 7/7 PASS at the higher context cap
137K NIAH	True long-context decoding test	✅ Recalled needle from 137,557-token prompt (bronze octopus 17 retrieved cleanly), 5min wall, ~458 effective TPS over the full request

The 137K NIAH is the test I'd really wanted to add to my earlier comment — it confirms decode integrity at long context, not just allocation. No decode-TPS decay across the prompt, no needle-drop, no garbled output.

Trade vs the BF16 KV path (without this PR)

Same dual 3090 / TP=2 / Gemma 4 + MTP rig:

KV format	Max ctx	Narr/Code TPS	KV pool	Comment
BF16 (without this PR)	32K	105.91 / 141.11	99K tokens	Hard ceiling
INT8 PTH (with this PR)	262K ⭐	95.27 / 125.93	455K tokens	8.2× context lift, ~10% TPS cost

That's a Pareto improvement for any workload above 32K context, which is most agent / RAG / document workflows.

Cross-architecture summary so far

Architecture	Tested by	Dtype	Status
sm_120 Blackwell consumer (4× 5060 Ti)	@cferra	FP8 PTH	✅ Fixes the long-standing Gemma 4 FP8 garbage bug
sm_86 Ampere consumer (2× 3090)	@noonghunna	INT8 PTH	✅ 7/7 verify-stress + 137K NIAH at 262K max ctx

Two different consumer architectures, two different dtypes within the per-token-head family, both confirming the fix. Plus your fp8 baseline on the original PR test rig.

Local artifacts

If anyone wants to reproduce on Ampere consumer:

• Compose: docker-compose.gemma-mtp-int8.yml
• Vendored 7-file PR overlay (rebased): vllm-pr40391-rebased/
• Validation commits: f93d312, 1e1886a
• README with rebase notes: vllm-pr40391-rebased/README.md

One observation worth flagging — first-request cold-start corruption

Both the 98K and the 262K configs reproducibly emit garbage on the very first chat completion request after a fresh container boot (e.g. 'The capital1edist...' instead of 'The capital of France is Paris.'). Subsequent requests are clean. Symptoms:

• Only the first request after docker compose up
• Same prompt sent twice → first garbage, second clean
• All other prompts (math, code) are clean from the first request
• Cudagraph capture sizes were [1, 2, 4, 8] for the 262K config (single-stream-only)

Smells like a cudagraph capture-warmup race where the very first decode batch hits a graph that wasn't warmed correctly. Possibly Gemma 4 specific (haven't seen it on Qwen3.6 + same vLLM nightly), possibly per-token-head specific. Filing a separate issue if I can isolate; for now noting it here in case it's connected to anything you've already debugged.

This is a separate issue from the PR's scope — the PR's fix is solid in terms of decode integrity once the cudagraph is warm.

Net

PR fully validated on a second consumer architecture with the INT8 PTH dtype variant. Strong cross-rig signal that it's ready to merge — reviewers welcome to lean on cferra's FP8 PTH on Blackwell + this Ampere INT8 PTH data as production-validated coverage of the consumer GPU space.

Thanks @lisp19 for the patient iteration on this PR.

[ldwnt]

Tested Gemma 4 31B AWQ INT4 with int8_per_token_head on A100 80G: prefill / decode speed fell from 1043.4/22.5 (context = 8K) to 636.6/1.1 (context = 100K). With context = 100K, the E2E time was 174s, compared to 54s of Qwen 3.6 27B AWQ INT4. I don't know about LLM, but does it have anything to do with the fallback from FA2 to Triton?