[Perf] Integrate flash-maxsim Triton kernels for late-interaction scoring#40337
[Perf] Integrate flash-maxsim Triton kernels for late-interaction scoring#40337roipony wants to merge 10 commits intovllm-project:mainfrom
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…ring Replaces the vanilla padded-bmm MaxSim (PR vllm-project#35330, vllm-project#38620) with vendored flash-maxsim Triton kernels for ColBERT/ColPali document scoring. Three scoring paths, with automatic fallback: 1. Zero-copy (default): project hidden_states once, rerank kernel reads doc slices directly from projected_batch. No torch.cat, no score-matrix materialization. 2. Flash-packed (when zerocopy disabled or params not compatible): torch.cat + single fused kernel call, no padding. 3. Vanilla (CPU, d<16, or no Triton): original padded bmm. Key results on A100 80GB with ColBERT: - Kernel speedup on varlen docs: 100-3000x vs vanilla padded bmm - E2E throughput: +15-23% at 500+ docs/req (reranking workloads) - P95 latency: 13-24% lower - Score parity: max_abs_diff < 0.001 on 5K real docs, top-3 rankings identical Kernel correctness: max_err=4e-6 vs fp32 reference. Falls back to vanilla for CPU tensors, embedding dim < 16, chunked-prefill, or when pooling params request matryoshka truncation / activation off. Addresses: vllm-project#38282 Signed-off-by: roi.pony <roi.pony@ibm.com>
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Code Review
This pull request introduces "Flash-MaxSim," a suite of fused Triton kernels designed to optimize ColBERT and ColPali MaxSim scoring. The implementation features a "zero-copy" path that allows the model to read document embeddings directly from the projected output tensor, significantly reducing memory overhead and latency. The changes include specialized kernels for variable-length sequences, Q-reuse, and split-K optimizations, alongside comprehensive benchmarking and OOM resilience demos. Review feedback highlights a missing normalization step in the batch projection method, potential performance bottlenecks caused by GPU-to-CPU synchronizations in the model runner, and shared memory constraints in the persistent kernel for large embedding dimensions.
| if self.projector is not None: | ||
| import torch.nn.functional as F | ||
| w = self.projector.weight.to(hidden_states.dtype) | ||
| b = (self.projector.bias.to(hidden_states.dtype) | ||
| if self.projector.bias is not None else None) | ||
| hidden_states = F.linear(hidden_states, w, b) | ||
| # Cast the small [N, embed_dim] result, not the big [N, hidden]. | ||
| if self.head_dtype is not None: | ||
| hidden_states = hidden_states.to(self.head_dtype) | ||
| if self.activation is not None: | ||
| hidden_states = self.activation(hidden_states) | ||
| return hidden_states |
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The project_batch implementation is missing the normalization step that is typically required for late-interaction models like ColBERT. If the model is configured to normalize embeddings (which is standard for MaxSim scoring), this method will produce unnormalized vectors, leading to incorrect similarity scores when compared against normalized query embeddings from forward_chunk. You should call self._normalize(hidden_states) before returning, or ensure that the use_zerocopy check in the model runner accounts for the normalization requirement.
| firsts = cursor.first_token_indices_gpu.tolist() | ||
| lasts = cursor.last_token_indices_gpu.tolist() |
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Calling .tolist() on CUDA tensors (first_token_indices_gpu and last_token_indices_gpu) triggers a synchronous host-to-device copy and blocks the CPU until the GPU stream reaches this point. This introduces a significant performance bottleneck in the model runner's hot path. You should use CPU-side metadata if available in the PoolingCursor or PoolingMetadata to avoid this synchronization.
| if torch.cuda.is_available(): | ||
| torch.cuda.empty_cache() |
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Using torch.cuda.empty_cache() is generally discouraged in performance-critical applications like vLLM. It is a slow operation that forces a synchronization and can lead to memory fragmentation by releasing all unused cached memory back to the OS. Since this warmup happens during initialization, it's better to let the caching allocator manage the memory normally.
| BLOCK_Q = 32 | ||
| BLOCK_D = 64 |
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The flash_maxsim_persistent kernel uses fixed block sizes (BLOCK_Q=32, BLOCK_D=64) without autotuning or bounds checking on the embedding dimension d. For large embedding dimensions (e.g., d=1024 or d=2048), the shared memory required for these blocks ((BLOCK_Q + BLOCK_D) * d * sizeof(fp16)) will exceed the hardware limits of many GPUs (like the 164KB limit on A100), causing the kernel to fail at launch. Please add a check for d or implement autotuning for this persistent variant.
| from vllm.v1.pool.late_interaction import ( | ||
| LATE_INTERACTION_MODE_SCORE_DOC, | ||
| ) |
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Hi @roipony, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, Tip Is
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Re: gemini-code-assist's "critical" note on For The one divergence from Verified empirically against the vanilla path on 5K real ColBERT docs: Happy to add a comment in |
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Hi @roipony, thank you for the detailed clarification and for verifying the normalization behavior. That makes perfect sense. Since you've confirmed that |
- flash_maxsim.py / flash_maxsim_varlen.py: widen query_chunk_size / max_seqlen_d to int | None to match None usage. - heads.py: narrow self.projector to nn.Linear before accessing .weight/.bias; fall back to direct call otherwise. - late_interaction_runner.py / gpu_model_runner.py: assert PoolingCursor / projected_batch is not None where already guaranteed by the use_zerocopy guard. - gpu_model_runner.py: hoist LATE_INTERACTION_MODE_SCORE_DOC import to module scope (per review feedback); use a local list for the zero-copy output builder to keep PoolerOutput narrowing correct. No behavior change. Verified: mypy clean on changed lines, pytest tests/v1/worker/test_late_interaction_runner.py -v (4 passed). Signed-off-by: roi.pony <roi.pony@ibm.com>
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Hi @roipony, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, Tip Is
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to make pre-commit happy tips: |
Two pre-commit policy checks caught after the first push:
1. Triton imports must go through the `vllm.triton_utils` wrapper so
the modules stay importable on CPU-only builds (where Triton
isn't installed and is replaced by a placeholder).
- flash_maxsim.py, flash_maxsim_rerank.py, flash_maxsim_varlen.py,
flash_maxsim_advanced.py:
`import triton; import triton.language as tl`
-> `from vllm.triton_utils import tl, triton`
2. Prefer `torch.accelerator.*` over `torch.cuda.*` for the
side-effect APIs per RFC vllm-project#30679.
- late_interaction_runner.py: `torch.cuda.empty_cache()` ->
`torch.accelerator.empty_cache()`
- demo_flash_maxsim.py, bench_flash_maxsim.py:
`torch.cuda.synchronize()` -> `torch.accelerator.synchronize()`
Leaving `torch.cuda.is_available()`, `torch.cuda.current_device()`,
`torch.cuda.get_device_capability()`, and `torch.cuda.get_device_name()`
untouched — those are introspection-only and remain the canonical
spelling per the RFC.
No functional change.
Signed-off-by: roi.pony <roi.pony@ibm.com>
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Hi @roipony, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, Tip Is
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Previous pass missed memory-stat helpers in bench and current_device() in the runner. - tests/v1/worker/bench_flash_maxsim.py: torch.cuda.reset_peak_memory_stats() torch.cuda.memory_allocated() torch.cuda.max_memory_allocated() -> torch.accelerator.* - vllm/v1/worker/gpu/pool/late_interaction_runner.py: torch.cuda.current_device() -> torch.accelerator.current_device_index() torch.cuda.is_available / get_device_capability / get_device_name / get_device_properties remain (introspection, not flagged by the policy check). No functional change. Signed-off-by: roi.pony <roi.pony@ibm.com>
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Hi @roipony, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, Tip Is
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- Run `ruff format` on all flash-maxsim files (whitespace/wrapping only — no logic changes). - Add SPDX license + copyright headers to the 6 new files that were missing them (4 flash_maxsim kernels + 2 demo scripts). Signed-off-by: roi.pony <roi.pony@ibm.com>
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cc @yewentao256 |
mkdocstrings/griffe flagged that `pack_pairs`'s `Returns:` section mentioned `max_ld` without a matching type in the function signature, which tripped the `--strict` ReadTheDocs build. Annotate the full return tuple. No behavior change. Signed-off-by: roi.pony <roi.pony@ibm.com>
yewentao256
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Thanks for the work! I am a little bit concerned about the 3k LOC PR introducing a lot complexity, could you shrink the diff? Idealy <1k LOC.
Per review (@yewentao256): shrink the diff to reduce review surface and complexity. Every line removed here was either unused in the production scoring path or a development helper that belongs outside this PR. Deleted (vendored but never dispatched by the runner): - flash_maxsim.py (979 LOC) — 3D batched kernel, only referenced from the warmup; replaced by shared utilities in _common.py (119 LOC). - flash_maxsim_advanced.py (497 LOC) — q-reuse / split-K variants, no dispatch. Deleted (demo / benchmark helpers, not part of the runtime): - tests/v1/worker/demo_flash_maxsim.py (164 LOC) - tests/v1/worker/demo_oom_resilience.py (272 LOC) - tests/v1/worker/bench_flash_maxsim.py (236 LOC) Trimmed to production-only entry points: - flash_maxsim_varlen.py: kept flash_maxsim_packed + pack_docs (used by the packed fallback); dropped flash_maxsim_varlen + pack_pairs + the per-pair varlen kernel. - flash_maxsim_rerank.py: kept flash_maxsim_rerank_direct (the zero-copy scoring path); dropped the cu_seqlens variant. Runner warmup now only precompiles the two kernels the runtime calls (flash_maxsim_rerank_direct + flash_maxsim_packed). Net: +142 / -2449. Full PR diff against main drops from ~3.2K to well under 1K LOC. No change to the zero-copy scoring path or the packed-fallback path — scores verified identical after the trim (max_diff = 0.0 on a simple packed vs rerank_direct equivalence check; existing pytest late_interaction_runner tests: 4 passed). Signed-off-by: roi.pony <roi.pony@ibm.com>
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Thanks for the feedback @yewentao256 — pushed a trim commit that brings the PR down to 930 LOC (from ~3.2K). What I cut:
Runner warmup now precompiles only the two kernels the runtime actually calls. No change to either scoring path. Score parity verified: Final breakdown (vs. main):
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Same mkdocstrings/griffe warning as the one fixed on pack_pairs earlier (pack_pairs was later removed); the trim commit exposed pack_docs to the same check. Adds `tuple[Tensor, Tensor, int]` return type. No behavior change. Signed-off-by: roi.pony <roi.pony@ibm.com>
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Thanks for the work!
Could you also test using these command and see how much e2e throughput we can get comparing with main?
vllm serve --model jinaai/jina-colbert-v2 --runner pooling --port 9256 --enforce-eager --max-model-len 4096 --max-num-batched-tokens 4096 --disable-log-stats --hf-overrides '{"architectures": ["ColBERTJinaRobertaModel"]}' --trust-remote-code
vllm bench serve --model jinaai/jina-colbert-v2 --backend vllm-rerank --endpoint /v1/rerank --host 127.0.0.1 --port 9256 --dataset-name random-rerank --num-prompts 2000 --request-rate inf --max-concurrency 64 --seed 0 --random-input-len 2048 --random-range-ratio 0.5 --percentile-metrics e2el --metric-percentiles 50,95,99|
Thanks @yewentao256 -- I ran your exact command at two batch sizes ( All numbers below are the median of 3 repetitions. Hardware: 1x A100-SXM4-80GB, Results
MaxSim share of end-to-end runtime (Amdahl bound)The kernel only changes the pooling + MaxSim stage. Per-request cost decomposes roughly as:
By Amdahl's law, the maximum end-to-end speedup from improving only MaxSim is bounded by its share of total runtime:
This is why we added W16: to find a regime where the MaxSim share is large enough that the kernel improvement is visible above the encoder-bound noise floor. Why W16 needs a non-default token budgetThe default W16 uses: --max-num-batched-tokens 2000000 # default: 4096
--max-num-seqs 16384 # default: 128
--max-concurrency 1 # deterministic, isolates engine behaviorPer-stage engine profileOptional per-step profiling is available through the At
The vanilla per-step cost comes from the Python loop over Cold start and warmupWithout The MoE kernels in vLLM solve this by shipping pre-tuned JSON configs under paths like I am happy to follow the same pattern in a follow-up PR:
I can also bundle this into the current PR if preferred. ReproductionServer for W1 and W6vllm serve --model jinaai/jina-colbert-v2 --runner pooling --port 9256 \
--enforce-eager --max-model-len 4096 --max-num-batched-tokens 4096 \
--disable-log-stats \
--hf-overrides '{"architectures":["ColBERTJinaRobertaModel"]}' \
--trust-remote-codeServer for W16Same as above, but add Bench W1 (B=1, L=2048)vllm bench serve --model jinaai/jina-colbert-v2 \
--backend vllm-rerank --endpoint /v1/rerank --port 9256 \
--dataset-name random-rerank --num-prompts 2000 --num-warmups 2 \
--request-rate inf --max-concurrency 64 --seed 0 \
--random-input-len 2048 --random-range-ratio 0.5 \
--random-batch-size 1 \
--percentile-metrics e2el --metric-percentiles 50,95,99Bench W6 (B=1000, L=256)Same as W1, but replace with Bench W16 (B=10000, L=128, concurrency=1)vllm bench serve --model jinaai/jina-colbert-v2 \
--backend vllm-rerank --endpoint /v1/rerank --port 9256 \
--dataset-name random-rerank --num-prompts 300000 --num-warmups 2 \
--request-rate inf --max-concurrency 1 --seed 0 \
--random-input-len 128 --random-range-ratio 0.5 \
--random-batch-size 10000 \
--percentile-metrics e2el --metric-percentiles 50,95,99Correctness
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Pre-compile Triton kernels for Lq ∈ {32,64,128,256,512,1024} instead
of {32,64,128,256}. Random-rerank workloads with input_len=512 can
sample queries up to ~380 tokens, which round up to Lq bucket 512 at
autotune time; without pre-warm, the first request into that bucket
blocks on Triton compile and inflates P99 tail.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Signed-off-by: roi.pony <roi.pony@ibm.com>
The else branch in TokenEmbeddingPoolerHead.project_batch passed
hidden_states to self.projector(...) without first casting them to
head_dtype. When the projector is an nn.Sequential held at fp32
(auto-loaded from a sentence-transformers 1_Dense/ folder via
_load_st_projector) and the model trunk emits fp16/bf16 hidden
states, the projector errored out:
RuntimeError: mat1 and mat2 must have the same dtype
This affects ColBERTModernBertModel when the checkpoint lacks
colbert_linear.weight and the HF config lacks colbert_dim/dim/
projection_dim — i.e. the documented lightonai/GTE-ModernColBERT-v1
configuration. jina-colbert-v2 is unaffected because its checkpoint
loads colbert_linear as a flat nn.Linear, hitting the optimized
weight-downcast branch.
Fix: in the non-Linear branch, cast input up to head_dtype before
applying the projector. Mirrors the cast in forward_chunk. Loses
the deferred-cast memory benefit on this path, but correctness first;
downcasting the inner Linear of an nn.Sequential would require
walking the sub-modules.
Adds tests/v1/worker/test_pooler_head_project_batch.py with three
regression tests:
* Sequential projector at fp32 with fp16/bf16 input — pre-fix raises
* Linear projector parity vs Sequential projector — both produce
matching outputs within fp16/bf16 ulp
* No-projector pass-through path
Found by ultrareview multi-agent review.
Co-Authored-By: ultrareview <noreply@anthropic.com>
Signed-off-by: roi.pony <roi.pony@ibm.com>
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Summary
Replaces the vanilla padded-bmm MaxSim path (introduced in #35330, re-enabled on GPU in #38620) with vendored flash-maxsim Triton kernels for ColBERT / ColPali document scoring.
Addresses feature request #38282.
Why this isn't a duplicate
is:pr is:open flash maxsim).compute_maxsim_score_batchedthat this PR replaces.Approach
Three scoring paths with automatic fallback:
Zero-copy (default for GPU, d ≥ 16, no chunked prefill, default pooling params):
hidden_statesonce viaTokenEmbeddingPoolerHead.project_batch().[L, d]view intoprojected_batch— no copy, no extra allocation.flash_maxsim_rerank_directreads each doc at(offset, length)directly from the projected tensor.[B, Lq, Ld]score matrix is never materialized; the fused kernel tiles through SRAM.Flash-packed (fallback when zerocopy disabled or pooling params use matryoshka /
use_activation=False):torch.catall docs once, callflash_maxsim_packedwithcu_seqlens.cu_seqlens.Vanilla (fallback for CPU tensors, embedding dim < 16 (Triton
tl.dotminimum), orVLLM_FORCE_VANILLA_MAXSIM=1):Triton autotune keys are bucketed (
{32, 64, 128, 256, 512, 1024, 2048, 4096}for Lq/Ld,next_pow2(d)for embed dim).LateInteractionRunner.__init__pre-compiles 72 bucket combinations so no autotune fires on first request; failures during warmup are logged and cleanup is infinally.Files
New (vendored Triton kernels —
vllm/v1/pool/flash_maxsim/):flash_maxsim.py— main forward kernel (hardware-specific autotune configs)flash_maxsim_rerank.py— zero-copy rerank kernel (reads scattered offsets)flash_maxsim_varlen.py— packed cu_seqlens kernelflash_maxsim_advanced.py— q-reuse / split-K variants__init__.pyModified:
vllm/v1/pool/late_interaction.py—compute_maxsim_score_batcheddispatches to flash when availablevllm/v1/worker/gpu/pool/late_interaction_runner.py— kernel warmup,_score_zerocopy,has_pending_docsvllm/v1/worker/gpu_model_runner.py— zerocopy branch in_pool()with fallback on chunked prefill / matryoshka /use_activation=Falsevllm/model_executor/layers/pooler/tokwise/heads.py—project_batch()method (fp16 matmul, fp32 cast of small output)Tests / demos:
tests/v1/worker/test_late_interaction_runner.py— updated to d=32 (Triton requires K≥16)tests/v1/worker/bench_flash_maxsim.py— detailed kernel benchmarktests/v1/worker/demo_flash_maxsim.py— copy-paste kernel/memory comparisontests/v1/worker/demo_oom_resilience.py— live server OOM demoEnvironment toggles
VLLM_DISABLE_ZEROCOPY=1— disable zero-copy, use flash-packedVLLM_FORCE_VANILLA_MAXSIM=1— disable flash entirely, use vanilla bmmVLLM_FLASH_MAXSIM_WARMUP_D=<d>— extend warmup to an extra embedding dimResults (A100 80GB, ColBERT)
Kernel-level on variable-length docs
Most of vanilla's time (>90%) on varlen workloads is Python-side padding / fp32 cast / allocation, not bmm. The fused kernel eliminates that bookkeeping.
E2E
/v1/score(real embeddings, concurrent clients, best-of-3)Correctness
max_abs_err = 4e-6max_abs_diff < 0.001, zero pairs > 0.001 off, top-3 rankings identicalSmall tail-ranking noise at positions 4-5 reflects fp16 tensor-core nondeterminism on scores within 5e-4 of each other.
Test plan
pytest tests/v1/worker/test_late_interaction_runner.py -v→ 4 passedpython tests/v1/worker/demo_flash_maxsim.py→ kernel speedups & memory savings displayedpython tests/v1/worker/bench_flash_maxsim.py→ full kernel benchmark/v1/scorewithVLLM_FORCE_VANILLA_MAXSIMvs flash → score parity verifiedpre-commit runruff clean on all changed filesmainNotes for reviewers
pooling_params.dimensionsis set (matryoshka) oruse_activation=False, becauseproject_batchnormalizes before truncation — matryoshka would produce non-unit vectors. Falls back on chunked prefill for the same reason (partial cache).flash_maxsim_advanced.py(q-reuse / split-K variants) is vendored but not dispatched from the default path. Kept for potential follow-ups.AI assistance
Development of this PR used AI assistance (Claude). Every changed line was reviewed by the submitter; benchmarks were run end-to-end by the submitter against both paths on real A100 hardware with real ColBERT embeddings.