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bugfix(dcp, gdn): disabling DCP semantics for linear-attention KV/state groups - #36480

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bugfix(dcp, gdn): disabling DCP semantics for linear-attention KV/state groups#36480
pisceskkk wants to merge 2 commits into
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pisceskkk:dcp/gdn

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@pisceskkk

@pisceskkk pisceskkk commented Mar 9, 2026

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Purpose

This PR fixes Qwen3.5 behavior under Decode Context Parallel (DCP) by applying DCP only to full-attention KV cache groups and keeping linear-attention/Mamba state-cache groups on non-DCP semantics.

  • Full-attention layers still benefit from DCP
  • Linear-attention layers no longer inherit incorrect DCP block/state semantics
  • This avoids the precision issues and occasional operator failures seen in Qwen3.5 under DCP, without adding DCP compatibility requirements for linear attention

Test Plan

bash .buildkite/lm-eval-harness/run-lm-eval-gsm-vllm-baseline.sh -m Qwen/Qwen3.5-2B -b "auto" -l 1000 -f 5 -t 4

Test Result

vllm ({'pretrained': 'Qwen/Qwen3.5-2B', 'tensor_parallel_size': 4, 'add_bos_token': True, 'max_model_len': 4096}), gen_kwargs: ({}), limit: 1000.0, num_fewshot: 5, batch_size: auto
|Tasks|Version|     Filter     |n-shot|  Metric   |   |Value|   |Stderr|
|-----|------:|----------------|-----:|-----------|---|----:|---|-----:|
|gsm8k|      3|flexible-extract|     5|exact_match|↑  |0.576|±  |0.0156|
|     |       |strict-match    |     5|exact_match|↑  |0.576|±  |0.0156|
vllm ({'pretrained': 'Qwen/Qwen3.5-2B', 'tensor_parallel_size': 4, 'add_bos_token': True, 'max_model_len': 4096, 'decode_context_parallel_size': 2, 'enforce_eager': True, 'attention_backend': 'FLASHINFER'}), gen_kwargs: ({}), limit: 1000.0, num_fewshot: 5, batch_size: auto
|Tasks|Version|     Filter     |n-shot|  Metric   |   |Value|   |Stderr|
|-----|------:|----------------|-----:|-----------|---|----:|---|-----:|
|gsm8k|      3|flexible-extract|     5|exact_match|↑  |0.590|±  |0.0156|
|     |       |strict-match    |     5|exact_match|↑  |0.591|±  |0.0156|

works well with FULL_DECODE_ONLY if cherry-pick #36503

vllm ({'pretrained': 'Qwen/Qwen3.5-2B', 'tensor_parallel_size': 4, 'add_bos_token': True, 'max_model_len': 4096, 'decode_context_parallel_size': 2, 'attention_backend': 'FLASHINFER'}), gen_kwargs: ({}), limit: 1000.0, num_fewshot: 5, batch_size: auto
|Tasks|Version|     Filter     |n-shot|  Metric   |   |Value|   |Stderr|
|-----|------:|----------------|-----:|-----------|---|----:|---|-----:|
|gsm8k|      3|flexible-extract|     5|exact_match|↑  |0.577|±  |0.0156|
|     |       |strict-match    |     5|exact_match|↑  |0.576|±  |0.0156|

Essential Elements of an Effective PR Description Checklist
  • The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
  • The test plan, such as providing test command.
  • The test results, such as pasting the results comparison before and after, or e2e results
  • (Optional) The necessary documentation update, such as updating supported_models.md and examples for a new model.
  • (Optional) Release notes update. If your change is user facing, please update the release notes draft in the Google Doc.

@mergify mergify Bot added v1 bug Something isn't working labels Mar 9, 2026

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Code Review

This pull request disables Decode Context Parallelism (DCP) for non-full-attention layers to address issues with models like Qwen3.5. This is achieved by making context parallelism settings per-KV-cache-group and only enabling them for FullAttentionSpec groups. The changes are implemented across the KV cache coordinator, GPU model runner, and block table management, including updates to a Triton kernel. The implementation is sound, but I've suggested a refactoring to improve maintainability by abstracting the DCP support check into the KVCacheSpec classes. This will make it easier to enable DCP for other attention types in the future.

Comment thread vllm/v1/core/kv_cache_coordinator.py Outdated
Comment thread vllm/v1/worker/gpu/model_runner.py
…ecks and handle group DCP world sizes dynamically

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>
@ehfd

ehfd commented Mar 12, 2026

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@cjackal This is the fix for DCP on Qwen3 and Qwen3.5, could you test together with #36503? (Cherry-picking both)

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Comment thread vllm/v1/worker/gpu/model_runner.py

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It looks like you updated model runner v2; did you test with VLLM_USE_V2_MODEL_RUNNER?

@pisceskkk

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It looks like you updated model runner v2; did you test with VLLM_USE_V2_MODEL_RUNNER?

My apologies—this was a bit of a blunder. DCP + Qwen 3.5 actually works fine on Model Runner v1. The earlier errors were caused by a bug in the backend.
I initially assumed the issue was related to DCP affecting the linear layer’s KV cache storage, so quickly put a fix to isolate the KV cache manager using codex. I caught the precision looks good but didn't realize it was actually modifying Model Runner v2 instead of v1.

@pisceskkk pisceskkk closed this Apr 2, 2026
@github-project-automation github-project-automation Bot moved this to Done in NVIDIA Apr 2, 2026
@ehfd

ehfd commented Apr 3, 2026

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Just noting that DCP + Qwen3.5 doesn't necessarily work:

Details
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:299] 
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:299]        █     █     █▄   ▄█
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:299]  ▄▄ ▄█ █     █     █ ▀▄▀ █  version 0.19.0
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:299]   █▄█▀ █     █     █     █  model   Qwen/Qwen3.5-397B-A17B-FP8
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:299]    ▀▀  ▀▀▀▀▀ ▀▀▀▀▀ ▀     ▀
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:299] 
(APIServer pid=1) INFO 04-03 09:50:52 [utils.py:233[] non-default args: {'api_server_count': 8, 'enable_auto_tool_choice': True, 'tool_call_parser': 'qwen3_coder', 'host': '0.0.0.0', 'port': 5000, 'model': 'Qwen/Qwen3.5-397B-A17B-FP8', 'trust_remote_code': True, 'max_model_len': 1010000, 'hf_overrides': {'text_config': {'rope_parameters': {'mrope_interleaved': True, 'mrope_section': [11, 11, 10], 'rope_type': 'yarn', 'rope_theta': 10000000, 'partial_rotary_factor': 0.25, 'factor': 4.0, 'original_max_position_embeddings': 262144}}}, 'download_dir': '/workspace/.cache/huggingface/hub', 'reasoning_parser': 'qwen3', 'tensor_parallel_size': 8, 'decode_context_parallel_size': 4, 'gpu_memory_utilization': 0.925, 'enable_prefix_caching': True, 'mamba_cache_mode': 'align', 'mm_processor_cache_gb': 8.0, 'mm_processor_cache_type': 'shm', 'mm_encoder_tp_mode': 'data', 'max_num_batched_tokens': 16384, 'max_num_seqs': 256, 'enable_chunked_prefill': True}
(APIServer pid=1) INFO 04-03 09:51:08 [model.py:549] Resolved architecture: Qwen3_5MoeForConditionalGeneration
(APIServer pid=1) INFO 04-03 09:51:08 [model.py:1678] Using max model len 1010000
(APIServer pid=1) INFO 04-03 09:51:08 [scheduler.py:238] Chunked prefill is enabled with max_num_batched_tokens=16384.
(APIServer pid=1) INFO 04-03 09:51:08 [config.py:461] Warning: Prefix caching in Mamba cache 'align' mode is currently enabled. Its support for Mamba layers is experimental. Please report any issues you may observe.
(APIServer pid=1) INFO 04-03 09:51:11 [config.py:281] Setting attention block size to 528 tokens to ensure that attention page size is >= mamba page size.
(APIServer pid=1) INFO 04-03 09:51:11 [config.py:312] Padding mamba page size by 1.34% to ensure that mamba page size and attention page size are exactly equal.
(APIServer pid=1) INFO 04-03 09:51:11 [vllm.py:790] Asynchronous scheduling is enabled.
(APIServer pid=1) INFO 04-03 09:51:11 [compilation.py:290] Enabled custom fusions: norm_quant, act_quant
(EngineCore pid=401) INFO 04-03 09:51:32 [core.py:105[] Initializing a V1 LLM engine (v0.19.0) with config: model='Qwen/Qwen3.5-397B-A17B-FP8', speculative_config=None, tokenizer='Qwen/Qwen3.5-397B-A17B-FP8', skip_tokenizer_init=False, tokenizer_mode=auto, revision=None, tokenizer_revision=None, trust_remote_code=True, dtype=torch.bfloat16, max_seq_len=1010000, download_dir='/workspace/.cache/huggingface/hub', load_format=auto, tensor_parallel_size=8, pipeline_parallel_size=1, data_parallel_size=1, decode_context_parallel_size=4, dcp_comm_backend=ag_rs, disable_custom_all_reduce=False, quantization=fp8, enforce_eager=False, enable_return_routed_experts=False, kv_cache_dtype=auto, device_config=cuda, structured_outputs_config=StructuredOutputsConfig(backend='auto', disable_any_whitespace=False, disable_additional_properties=False, reasoning_parser='qwen3', reasoning_parser_plugin='', enable_in_reasoning=False), observability_config=ObservabilityConfig(show_hidden_metrics_for_version=None, otlp_traces_endpoint=None, collect_detailed_traces=None, kv_cache_metrics=False, kv_cache_metrics_sample=0.01, cudagraph_metrics=False, enable_layerwise_nvtx_tracing=False, enable_mfu_metrics=False, enable_mm_processor_stats=False, enable_logging_iteration_details=False), seed=0, served_model_name=Qwen/Qwen3.5-397B-A17B-FP8, enable_prefix_caching=True, enable_chunked_prefill=True, pooler_config=None, compilation_config={'mode': <CompilationMode.VLLM_COMPILE: 3>, 'debug_dump_path': None, 'cache_dir': '', 'compile_cache_save_format': 'binary', 'backend': 'inductor', 'custom_ops': ['+quant_fp8', 'none', '+quant_fp8'], 'splitting_ops': ['vllm::unified_attention', 'vllm::unified_attention_with_output', 'vllm::unified_mla_attention', 'vllm::unified_mla_attention_with_output', 'vllm::mamba_mixer2', 'vllm::mamba_mixer', 'vllm::short_conv', 'vllm::linear_attention', 'vllm::plamo2_mamba_mixer', 'vllm::gdn_attention_core', 'vllm::olmo_hybrid_gdn_full_forward', 'vllm::kda_attention', 'vllm::sparse_attn_indexer', 'vllm::rocm_aiter_sparse_attn_indexer', 'vllm::unified_kv_cache_update', 'vllm::unified_mla_kv_cache_update'], 'compile_mm_encoder': False, 'cudagraph_mm_encoder': False, 'encoder_cudagraph_token_budgets': [], 'encoder_cudagraph_max_images_per_batch': 0, 'compile_sizes': [], 'compile_ranges_endpoints': [16384[], 'inductor_compile_config': {'enable_auto_functionalized_v2': False, 'size_asserts': False, 'alignment_asserts': False, 'scalar_asserts': False, 'combo_kernels': True, 'benchmark_combo_kernel': True}, 'inductor_passes': {}, 'cudagraph_mode': <CUDAGraphMode.FULL_AND_PIECEWISE: (2, 1)>, 'cudagraph_num_of_warmups': 1, 'cudagraph_capture_sizes': [1, 2, 4, 8, 16, 24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 200, 208, 216, 224, 232, 240, 248, 256, 272, 288, 304, 320, 336, 352, 368, 384, 400, 416, 432, 448, 464, 480, 496, 512[], 'cudagraph_copy_inputs': False, 'cudagraph_specialize_lora': True, 'use_inductor_graph_partition': False, 'pass_config': {'fuse_norm_quant': True, 'fuse_act_quant': True, 'fuse_attn_quant': False, 'enable_sp': False, 'fuse_gemm_comms': False, 'fuse_allreduce_rms': False}, 'max_cudagraph_capture_size': 512, 'dynamic_shapes_config': {'type': <DynamicShapesType.BACKED: 'backed'>, 'evaluate_guards': False, 'assume_32_bit_indexing': False}, 'local_cache_dir': None, 'fast_moe_cold_start': True, 'static_all_moe_layers': ]}
(EngineCore pid=401) WARNING 04-03 09:51:32 [multiproc_executor.py:1014] Reducing Torch parallelism from 82 threads to 1 to avoid unnecessary CPU contention. Set OMP_NUM_THREADS in the external environment to tune this value as needed.
(EngineCore pid=401) INFO 04-03 09:51:32 [multiproc_executor.py:134] DP group leader: node_rank=0, node_rank_within_dp=0, master_addr=127.0.0.1, mq_connect_ip=10.244.18.30 (local), world_size=8, local_world_size=8
(Worker pid=561) INFO 04-03 09:51:42 [parallel_state.py:1400] world_size=8 rank=7 local_rank=7 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=560) INFO 04-03 09:51:43 [parallel_state.py:1400] world_size=8 rank=6 local_rank=6 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=559) INFO 04-03 09:51:43 [parallel_state.py:1400] world_size=8 rank=5 local_rank=5 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=554) INFO 04-03 09:51:43 [parallel_state.py:1400] world_size=8 rank=0 local_rank=0 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=557) INFO 04-03 09:51:44 [parallel_state.py:1400] world_size=8 rank=3 local_rank=3 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=558) INFO 04-03 09:51:44 [parallel_state.py:1400] world_size=8 rank=4 local_rank=4 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=555) INFO 04-03 09:51:44 [parallel_state.py:1400] world_size=8 rank=1 local_rank=1 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=556) INFO 04-03 09:51:44 [parallel_state.py:1400] world_size=8 rank=2 local_rank=2 distributed_init_method=tcp://127.0.0.1:44693 backend=nccl
(Worker pid=554) INFO 04-03 09:51:45 [pynccl.py:111] vLLM is using nccl==2.28.9
(Worker pid=561) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=554) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=559) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=558) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=560) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=557) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=556) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=555) WARNING 04-03 09:51:47 [symm_mem.py:66] SymmMemCommunicator: Device capability 8.0 not supported, communicator is not available.
(Worker pid=554) INFO 04-03 09:51:50 [parallel_state.py:1716] rank 0 in world size 8 is assigned as DP rank 0, PP rank 0, PCP rank 0, TP rank 0, EP rank 0, EPLB rank N/A
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:51:59 [gpu_model_runner.py:4735] Starting to load model Qwen/Qwen3.5-397B-A17B-FP8...
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [cuda.py:390] Using backend AttentionBackendEnum.FLASH_ATTN for vit attention
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [mm_encoder_attention.py:230] Using AttentionBackendEnum.FLASH_ATTN for MMEncoderAttention.
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [__init__.py:261] Selected MarlinFP8ScaledMMLinearKernel for Fp8LinearMethod
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [gdn_linear_attn.py:147] Using Triton/FLA GDN prefill kernel
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [fp8.py:396] Using MARLIN Fp8 MoE backend out of potential backends: ['AITER', 'FLASHINFER_TRTLLM', 'FLASHINFER_CUTLASS', 'DEEPGEMM', 'TRITON', 'MARLIN', 'BATCHED_DEEPGEMM', 'BATCHED_TRITON', 'XPU'].
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [cuda.py:334] Using FLASH_ATTN attention backend out of potential backends: ['FLASH_ATTN', 'FLASHINFER', 'TRITON_ATTN', 'FLEX_ATTENTION'].
(Worker_TP0_DCP0 pid=554) INFO 04-03 09:52:00 [flash_attn.py:596] Using FlashAttention version 2
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(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:22 [default_loader.py:384] Loading weights took 500.22 seconds
(Worker_TP0_DCP0 pid=554) WARNING 04-03 10:00:22 [marlin_utils_fp8.py:97] Your GPU does not have native support for FP8 computation but FP8 quantization is being used. Weight-only FP8 compression will be used leveraging the Marlin kernel. This may degrade performance for compute-heavy workloads.
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:23 [fp8.py:560] Using MoEPrepareAndFinalizeNoDPEPModular
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:30 [gpu_model_runner.py:4820] Model loading took 48.7 GiB memory and 509.882080 seconds
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:31 [gpu_model_runner.py:5753] Encoder cache will be initialized with a budget of 16384 tokens, and profiled with 1 image items of the maximum feature size.
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:49 [backends.py:1051] Using cache directory: /root/.cache/vllm/torch_compile_cache/c9f92642bf/rank_0_0/backbone for vLLM's torch.compile
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:49 [backends.py:1111] Dynamo bytecode transform time: 11.05 s
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:00:53 [backends.py:372] Cache the graph of compile range (1, 16384) for later use
(EngineCore pid=401) INFO 04-03 10:01:31 [shm_broadcast.py:681] No available shared memory broadcast block found in 60 seconds. This typically happens when some processes are hanging or doing some time-consuming work (e.g. compilation, weight/kv cache quantization).
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:01:44 [backends.py:390] Compiling a graph for compile range (1, 16384) takes 53.51 s
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:01:48 [decorators.py:640] saved AOT compiled function to /root/.cache/vllm/torch_compile_cache/torch_aot_compile/7a195dce97b4d7839a6224abf39c06d41761f4767b8be1bb5c8ca2abb3adcf03/rank_0_0/model
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:01:48 [monitor.py:48] torch.compile took 69.26 s in total
(EngineCore pid=401) INFO 04-03 10:02:31 [shm_broadcast.py:681] No available shared memory broadcast block found in 60 seconds. This typically happens when some processes are hanging or doing some time-consuming work (e.g. compilation, weight/kv cache quantization).
(EngineCore pid=401) INFO 04-03 10:03:32 [shm_broadcast.py:681] No available shared memory broadcast block found in 60 seconds. This typically happens when some processes are hanging or doing some time-consuming work (e.g. compilation, weight/kv cache quantization).
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:03:48 [marlin_utils.py:433] Marlin kernel can achieve better performance for small size_n with experimental use_atomic_add feature. You can consider set environment variable VLLM_MARLIN_USE_ATOMIC_ADD to 1 if possible.
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:03:52 [monitor.py:76] Initial profiling/warmup run took 124.15 s
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:02 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:02 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:02 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:03 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:03 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:03 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:03 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:03 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:03 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:03 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:03 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:03 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:03 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:03 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:03 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:04 [gpu_model_runner.py:5876] Profiling CUDA graph memory: PIECEWISE=51 (largest=512), FULL=35 (largest=256)
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:08 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:08 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:08 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:08 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:09 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:09 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:09 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:09 [custom_all_reduce.py:216] Registering 480 cuda graph addresses
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:10 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:10 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:10 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:10 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:10 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:10 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:10 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:11 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:11 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:11 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:11 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:11 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:11 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:11 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:11 [gpu_model_runner.py:5955] Estimated CUDA graph memory: 2.38 GiB total
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:12 [gpu_worker.py:436] Available KV cache memory: 18.61 GiB
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:12 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9250 to 0.9551 to maintain the same effective KV cache size.
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1319] GPU KV cache size: 1,300,992 tokens
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1324] Maximum concurrency for 1,010,000 tokens per request: 5.08x
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(EngineCore pid=401) INFO 04-03 10:04:12 [kv_cache_utils.py:1311] Multiplying the GPU KV cache size by the cp_world_size 4 (pcp_world_size 1 * dcp_world_size 4).
(Worker_TP0_DCP0 pid=554) 
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Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  84%|████████▍ | 43/51 [00:09<00:01,  4.80it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  86%|████████▋ | 44/51 [00:09<00:01,  4.88it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  88%|████████▊ | 45/51 [00:09<00:01,  5.02it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  90%|█████████ | 46/51 [00:09<00:00,  5.09it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  92%|█████████▏| 47/51 [00:09<00:00,  5.18it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  94%|█████████▍| 48/51 [00:10<00:00,  4.97it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  96%|█████████▌| 49/51 [00:10<00:00,  5.09it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE):  98%|█████████▊| 50/51 [00:10<00:00,  4.66it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE): 100%|██████████| 51/51 [00:11<00:00,  3.05it/s]
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE): 100%|██████████| 51/51 [00:11<00:00,  4.58it/s]
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:33 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:33 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:33 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:33 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP0_DCP0 pid=554) 
Capturing CUDA graphs (decode, FULL):   0%|          | 0/35 [00:00<?, ?it/s]
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Capturing CUDA graphs (decode, FULL):  31%|███▏      | 11/35 [00:03<00:06,  3.66it/s]
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Capturing CUDA graphs (decode, FULL):  43%|████▎     | 15/35 [00:04<00:04,  4.07it/s]
Capturing CUDA graphs (decode, FULL):  46%|████▌     | 16/35 [00:04<00:04,  3.90it/s]
Capturing CUDA graphs (decode, FULL):  49%|████▊     | 17/35 [00:05<00:06,  2.58it/s]
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Capturing CUDA graphs (decode, FULL):  54%|█████▍    | 19/35 [00:06<00:05,  3.09it/s]
Capturing CUDA graphs (decode, FULL):  57%|█████▋    | 20/35 [00:06<00:04,  3.42it/s]
Capturing CUDA graphs (decode, FULL):  60%|██████    | 21/35 [00:06<00:03,  3.70it/s]
Capturing CUDA graphs (decode, FULL):  63%|██████▎   | 22/35 [00:06<00:03,  3.94it/s]
Capturing CUDA graphs (decode, FULL):  66%|██████▌   | 23/35 [00:06<00:02,  4.11it/s]
Capturing CUDA graphs (decode, FULL):  69%|██████▊   | 24/35 [00:07<00:02,  4.26it/s]
Capturing CUDA graphs (decode, FULL):  71%|███████▏  | 25/35 [00:07<00:02,  4.40it/s]
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Capturing CUDA graphs (decode, FULL):  77%|███████▋  | 27/35 [00:07<00:01,  4.48it/s]
Capturing CUDA graphs (decode, FULL):  80%|████████  | 28/35 [00:08<00:01,  4.41it/s]
Capturing CUDA graphs (decode, FULL):  83%|████████▎ | 29/35 [00:08<00:01,  3.97it/s]
Capturing CUDA graphs (decode, FULL):  86%|████████▌ | 30/35 [00:08<00:01,  3.99it/s]
Capturing CUDA graphs (decode, FULL):  89%|████████▊ | 31/35 [00:08<00:01,  3.86it/s]
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Capturing CUDA graphs (decode, FULL):  97%|█████████▋| 34/35 [00:09<00:00,  4.05it/s]
Capturing CUDA graphs (decode, FULL): 100%|██████████| 35/35 [00:10<00:00,  3.22it/s]
Capturing CUDA graphs (decode, FULL): 100%|██████████| 35/35 [00:10<00:00,  3.46it/s]
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:34 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:34 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:34 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:34 [custom_all_reduce.py:216] Registering 10320 cuda graph addresses
(Worker_TP7_DCP3 pid=561) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP5_DCP1 pid=559) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:35 [gpu_model_runner.py:6046] Graph capturing finished in 23 secs, took 2.11 GiB
(Worker_TP0_DCP0 pid=554) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP6_DCP2 pid=560) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP2_DCP2 pid=556) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP3_DCP3 pid=557) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP4_DCP0 pid=558) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(Worker_TP1_DCP1 pid=555) INFO 04-03 10:04:35 [gpu_worker.py:597] CUDA graph pool memory: 2.11 GiB (actual), 2.38 GiB (estimated), difference: 0.27 GiB (13.0%).
(EngineCore pid=401) INFO 04-03 10:04:35 [core.py:283] init engine (profile, create kv cache, warmup model) took 244.91 seconds
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108] EngineCore failed to start.
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108] Traceback (most recent call last):
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/engine/core.py", line 1082, in run_engine_core
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     engine_core = EngineCoreProc(*args, engine_index=dp_rank, **kwargs)
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/tracing/otel.py", line 178, in sync_wrapper
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     return func(*args, **kwargs)
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]            ^^^^^^^^^^^^^^^^^^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/engine/core.py", line 848, in __init__
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     super().__init__(
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/engine/core.py", line 143, in __init__
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     self.scheduler: SchedulerInterface = Scheduler(
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]                                          ^^^^^^^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/core/sched/async_scheduler.py", line 14, in __init__
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     super().__init__(*args, **kwargs)
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/core/sched/scheduler.py", line 225, in __init__
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     self.kv_cache_manager = KVCacheManager(
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]                             ^^^^^^^^^^^^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/core/kv_cache_manager.py", line 131, in __init__
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     self.coordinator = get_kv_cache_coordinator(
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]                        ^^^^^^^^^^^^^^^^^^^^^^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/core/kv_cache_coordinator.py", line 581, in get_kv_cache_coordinator
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     return HybridKVCacheCoordinator(
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]            ^^^^^^^^^^^^^^^^^^^^^^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]   File "/usr/local/lib/python3.12/dist-packages/vllm/v1/core/kv_cache_coordinator.py", line 402, in __init__
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]     assert all(
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108]            ^^^^
(EngineCore pid=401) ERROR 04-03 10:04:46 [core.py:1108] AssertionError: block_size must be divisible by hash_block_size
(Worker_TP6_DCP2 pid=560) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP3_DCP3 pid=557) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP2_DCP2 pid=556) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP5_DCP1 pid=559) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP0_DCP0 pid=554) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP7_DCP3 pid=561) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP4_DCP0 pid=558) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated
(Worker_TP1_DCP1 pid=555) WARNING 04-03 10:04:46 [multiproc_executor.py:871] WorkerProc was terminated

@pisceskkk
pisceskkk deleted the dcp/gdn branch June 23, 2026 06:13
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bug Something isn't working nvidia v1

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