[OneDNN] add mxfp8, mxfp4 onednn gemm#235
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Pull request overview
Updates the oneDNN backend and XPU bindings to enable MXFP8/MXFP4 (FP8/FP4 with block scaling) GEMM paths, along with expanded test coverage.
Changes:
- Bump oneDNN submodule to a commit that includes/aligns with MXFP8/MXFP4 GEMM support.
- Add FP4 GEMM operator plumbing (C++ op, torch binding, Python wrapper) and new FP4 GEMM tests.
- Extend FP8 GEMM tests and update FP8 matmul scaling-attribute handling for MXFP8 block scales.
Reviewed changes
Copilot reviewed 10 out of 10 changed files in this pull request and generated 7 comments.
Show a summary per file
| File | Description |
|---|---|
| third_party/oneDNN | Updates oneDNN submodule commit to pick up MXFP8/MXFP4 GEMM support. |
| tests/test_fp8_gemm_onednn.py | Expands fp8 GEMM test matrices and adds an MXFP8 GEMM test. |
| tests/test_fp4_gemm_onednn.py | Adds coverage for MXFP4 GEMM including reference reconstruction. |
| tests/register_ops.py | Adds a Python-level wrapper for the new fp4_gemm op. |
| csrc/xpu/torch_bindings.cpp | Registers the fp4_gemm operator schema and XPU implementation. |
| csrc/xpu/ops.h | Extends API surface with fp4_gemm declaration and updates shape comment. |
| csrc/xpu/onednn/onednn_matmul.cpp | Implements fp4_gemm entry point and routes to oneDNN FP4 matmul. |
| csrc/xpu/onednn/onednn_ext.h | Adds oneDNN dtype mappings for e8m0 scales and FP4, plus joint dtype cases. |
| csrc/xpu/onednn/fp8_gemm_w8a8.h | Adds MXFP8 scale handling via e8m0 block-wise scales. |
| csrc/xpu/onednn/fp4_gemm_w4a4.h | New oneDNN FP4 matmul implementation using block-wise e8m0 scales. |
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xinyu-intel
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Apr 8, 2026
Yejing-Lai
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Apr 8, 2026
* add mxfp4 onednn gemm Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com> * add ut for mx Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com> * fix Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com> * format with pre-commit Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com> * thanks copilot Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com> --------- Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Signed-off-by: mayuyuace <qiming1.zhang@intel.com> Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
vllm-project#232) Signed-off-by: Qiao, Zhefeng <zhefeng.qiao@intel.com> Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
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jikunshang
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