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[Hardware][Ascend] Add a Drama 3 NPU runner path - #9106
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This PR appears to belong to: docs/design/module/ar_runtime.md, docs/design/module/model_integration.md. Module owners: @gcanlin @fake0fan @Gaohan123 Routing: @gcanlin via module of the changed files, CODEOWNERS; @fake0fan via module of the changed files; @Gaohan123 via module of the changed files @amy-why-3459, please review your own changes and leave a short self-review comment describing what you checked. PRs without author self-review may not be assigned a reviewer. Please take a look when you have a chance. If you would like an automated review, mention @vllm-omni-review-bot in a comment. |
Omni ReviewBot: supersededThe CI failure noted on |
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Omni ReviewBot triage noteAutomated triage of commit
These are automated triage suggestions only — the final decision belongs to the maintainers. |
Dong1017
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Independent check of 9676bae8336a2127a668778e3dcdcd358e7fe7f0 against da572cddb38383deae9caef33b8d490e292ef071:
The frozen-head tests/model_executor/models/fish_omni/test_fish_omni_kernels_eager.py passed 11 tests in 0.20s, with CUDA_VISIBLE_DEVICES='' and Torch 2.13.0+cu130. This exercises the PR's CPU eager implementations for Gemma RMSNorm/residual, tower embedding/norm, sigmoid gating, top-k/top-p sampling (including ID mapping and shared top-k), and QK RMSNorm/RoPE/gate splitting against their reference contracts.
The 21-file source review found no code-level blocker: the AR worker selects the Ascend-aware V2 runner, the Fish Omni state supplies Ascend attention metadata while retaining the model-owned request lifecycle, and the DAC generation worker explicitly rejects V2.
The CPU result does not validate NPU dispatch, block-FP8 expert expansion, TP2+EP, or a completed speech request. No NPU card was free for independent device validation. The PR description's load/OOM results identify the older a1c9b9e11 revision, so they should remain scoped there. Please attach a TP2+EP load and at least one completed speech request for this head to demonstrate the current integration.
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NPU Seed-TTS result (2x Ascend 910B1)Measured on Seed-TTS-Eval English (1088 lines). Seed 42 shuffle, first 64 lines, the same 64 at every concurrency. Each line clones its own reference (
64/64 requests completed at every concurrency. Median WER is 0. Most non-zero items are Whisper writing digits or abbreviations differently ("ninety five" / "95", "Saint" / "St."). One concurrency-1 take stopped after "Later, he expelled the Jews of"; the same line is complete at 16, 32, and 64, with only Strassburg heard as Strasbourg. Two local compatibility edits, not in
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@FayeSpica PTAL |
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[P2] Keep preempted NPU frame history on the CPU When a Drama 3 request is preempted after generating frames, the new NPU model state inherits |
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Reviewed the current diff and the NPU runner, model-state lifecycle, eager kernels, FP8 loading, deployment and shared CUDA paths at Agree with @Dong1017's request for current-head device evidence: the published NPU measurements use 【Conclusion: Found blocking code issues and validation gaps in commit fc5f29f.】 |
Signed-off-by: amy-why-3459 <wuhaiyan17@huawei.com>
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Addressed the NPU preemption finding in b016b3885. The non-CUDA branch now copies history and count to CPU with I reproduced the reported CPU/NPU Command: Environment: why container, image The broader validation request remains open: this is a device-backed lifecycle regression, not TP2+EP PIECEWISE graph capture or streaming voice-clone validation. The available why container uses vLLM 0.31 and the previously documented checkpoint path is unavailable there; full serving validation was not run. The CUDA regression lane also remains to be verified on the new head. These unit-test results do not establish merge readiness for the full integration. |
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Looked at b016b388 (CPU host snapshot for non-CUDA preemption) relative to the last reviewed tip.
The production change matches the resume contract: add_request builds host numpy prompt rows from _SuspendedRequest.codes(), and the non-CUDA branch has no CUDA event to order a later slot reuse, so a blocking .to("cpu", copy=True) is the right substitute for the pinned+Event CUDA path. The CPU assertions on _suspended device type and the on_requests_finished cleanup are useful.
One issue in the new NPU regression is inline: the imported make_state fixture is not registered for that module, so the hardware test will not collect as written.
| pytestmark = [pytest.mark.core_model, *hardware_marks(res={"npu": "A2"}, num_cards=1)] | ||
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| def test_npu_history_survives_preemption_and_slot_reuse(make_state): # noqa: F811 - imported pytest fixture |
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make_state is a @pytest.fixture defined in tests/model_executor/models/fish_omni/test_fish_omni_model_state.py. Importing it here does not register it for this module (tests/conftest.py only loads tests.helpers.fixtures.*), so pytest will raise fixture 'make_state' not found when this file is collected on NPU CI.
Prefer a local fixture that applies the same OmniModelState monkeypatches and returns the factory, or move the shared factory into tests/helpers / a conftest that both modules load. Loading the other test module via pytest_plugins would also double-collect those CPU tests.
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I checked this by running only python -m pytest -q tests/platforms/npu/test_fish_omni_preemption.py in the why container with a real Ascend 910B3: 1 passed, exit 0, on the checkout used for fe4d073. Pytest discovers decorated fixture objects imported into a test module's namespace; conftest.py plugin registration is not required for that case. The command collected only the NPU test, not the CPU module's tests. The combined regression run also passed (43 tests). I kept the shared fixture instead of duplicating its setup or adding pytest_plugins. This is device-backed lifecycle coverage, not a full serving test.
Signed-off-by: amy-why-3459 <wuhaiyan17@huawei.com>
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Moved the Ascend-specific implementations into the NPU platform in fe4d0731b.
Validation in the why container (image Added an engine-construction ordering regression, but it cannot collect in this container because vLLM 0.31 lacks |
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Incremental review (tip fe4d0731 vs last reviewed b016b388)
Covered only the tip commit: Move Drama 3 adapters into the NPU platform (17 files). Earlier tips already reviewed; this is the relocation of Ascend-only helpers out of model_executor/models/fish_omni/.
What looks correct
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Boundary. Eager QK-RoPE install/require,
NPUFishOmniModelState, block-FP8 CPU expert expansion, and the Ascendprefill_endmamba shim now live undervllm_omni/platforms/npu/. CUDA/CPU call sites keep delayed imports gated ondevice_type == "npu", so importing fish_omni on non-Ascend hosts still avoidsvllm_ascend. -
prepare_stage_enginehook. Moving the mamba compat install fromStageEngineCoreProc.__init__ontoOmniPlatform.prepare_stage_engine(NPU override; default no-op) is the right layer. The new unit test asserts platform compat runs beforeEngineCoreProcconstruction. -
Shim behavior preserved.
_install_prefill_end_shimstill skips methods that already acceptprefill_end/**kwargs, and the relocated tests cover old / named / var-keyword signatures plus no-double-wrap. -
Quant / model_state factories.
ExpertFp8Config.get_quant_methodandcreate_fish_omni_model_statestill branch on NPU and call into the platform modules; tests were updated to patch the new locations.
Points to watch
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Exception narrowing. The old stage-engine path caught a broad
Exceptionaround the Ascend mamba import; the newmamba_compatpath only swallowsImportError. That is usually what we want (surface real install bugs), but if any non-ImportError failure was previously soft-ignored on mixed hosts, it will now abort stage construction. Confirm that is intentional. -
Process-wide
Qwen3NextAttention.__init__patch is unchanged in semantics (still process-wide, idempotent via_fish_omni_npu_eager). Fine for a Drama 3 stage process; just noting it moved, not redesigned. -
Docs (
model_integration.md/stage_runtime.md) correctly point at the new platform hook — good for the next reader.
No blockers on this tip for the relocation itself. Still outstanding from earlier reviews: a completed NPU speech request / load evidence on a current head (not the older OOM revision in the PR description).
Signed-off-by: amy-why-3459 <wuhaiyan17@huawei.com>
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Following up on the incremental review of 2658a1b4f documents this contract and adds regression coverage for both outcomes: Validation: The review's current-head NPU speech-request/load evidence requirement remains open. This focused compatibility test does not validate TP2+EP PIECEWISE serving or replace the CUDA regression lane; no new end-to-end inference claim is made. |
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Incremental review (tip 2658a1b4 vs last reviewed fe4d0731)
Covered only the tip commit: Document and test Mamba import failure handling (2 files).
What looks correct
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Exception narrowing clarified. The docstring now states that only missing imports are soft-ignored across Ascend versions, and that other init failures intentionally propagate on NPU. That answers the earlier note about the old stage-engine
except Exceptionvs the newImportError-only path. -
Regression coverage.
test_mamba_import_only_ignores_missing_dependenciesassertsImportErroris swallowed andRuntimeError(or any non-ImportError from the Ascend patch import) re-raises the same instance. That locks the intended behavior.
No further concerns on this tip. Still outstanding from earlier: a completed NPU speech request / load evidence on a current head.
Signed-off-by: amy-why-3459 <wuhaiyan17@huawei.com>
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Incremental review (tip 7fcc21ba vs last reviewed 2658a1b4)
Covered only the tip commit: Honor stage runner selection in NPU workers (2 files). The intervening 58a0e507 merge-from-main is ignored.
What looks correct
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Timing.
NPUARWorker.init_devicebuildsNPUOmniARModelRunnervsNPUARModelRunnerfromself.use_v2_model_runnerafter worker__init__. Overriding the flag inOmniNPUWorkerBase.__init__(post-super) is therefore early enough for construction, and also aligns any Ascend lifecycle methods that read the same attribute later. That matches the mixed V2 AR / V1 DAC deploy story. -
Source of truth. Reading
model_config.use_v2_model_runner(default False) matches howNPUGenerationWorkeralready rejects V2 from the stage config, so AR and generation agree on which knob wins over Ascend/vLLM’s global default. -
Test.
test_stage_runner_overrides_upstream_defaultcovers upstream{False,True}× stage{False,True,missing}and asserts the worker flag is True only when the stage sets it True. That locks the regression without needing a real Ascend card.
Points to watch
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Parent
__init__side effects. If Ascend’sNPUWorker.__init__already branches onuse_v2_model_runnerfor anything beyond the attribute itself (caches, profiler wiring, etc.), those branches still see the upstream default and are not re-run after the override. Worth a quick check against the vllm-ascend version you deploy with; construction itself is fine because Omni overridesinit_device. -
Still outstanding from earlier: a completed NPU speech request / load evidence on a current head (the PR description’s OOM numbers are still from the older
a1c9b9e11revision).
No blockers on this tip for the stage-runner override.
…mni@17bd19f3d775 vllm-project/vllm@main:recipes 19c0e170d257 → 8fae0ff58bae [latest.vllm] vllm-project/vllm@19c0e17...8fae0ff Commits: - vllm-project/vllm@da180efbcddc [ROCm][Recipe] MiniMax-M3.1-Flash: MI355X PD, DBO / SP prefill, Quark MXFP4, mono decode (vllm-project/vllm#63257) Recipes: - MiniMaxAI/MiniMax-M3.1-Flash (modified): https://recipes.vllm.ai/MiniMaxAI/MiniMax-M3.1-Flash vllm-project/vllm-omni@main:recipes 27fd77b48ccd → 17bd19f3d775 [latest.vllm-omni] vllm-project/vllm-omni@27fd77b...17bd19f Commits: - vllm-project/vllm-omni@439a3bb4b008 [Hardware][Ascend] Add a Drama 3 NPU runner path (vllm-project/vllm-omni#9106) Signed-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
…mni@c829af446829 vllm-project/vllm@main:recipes 0510bd667956 → c3117c7441dd [latest.vllm] vllm-project/vllm@0510bd6...c3117c7 Commits: - vllm-project/vllm@da180efbcddc [ROCm][Recipe] MiniMax-M3.1-Flash: MI355X PD, DBO / SP prefill, Quark MXFP4, mono decode (vllm-project/vllm#63257) Recipes: - MiniMaxAI/MiniMax-M3.1-Flash (modified): https://recipes.vllm.ai/MiniMaxAI/MiniMax-M3.1-Flash vllm-project/vllm-omni@main:recipes ea08ab6182e6 → c829af446829 [latest.vllm-omni] vllm-project/vllm-omni@ea08ab6...c829af4 Commits: - vllm-project/vllm-omni@439a3bb4b008 [Hardware][Ascend] Add a Drama 3 NPU runner path (vllm-project/vllm-omni#9106) Signed-off-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Signed-off-by: Armaan Amatya <armaanamatya2014@gmail.com>
Contributor intent (required human answers)
Source: the contributor asked to check whether vLLM-Omni can run Drama 3 on NPU, adapt it, and open a pull request.
1. What outcome do you want to achieve?
Run Fish Audio Drama 3 (
fishaudio/drama-3) on Ascend NPU with vLLM-Omni, and submit that adaptation as a pull request.2. What is the highest-leverage variable for that outcome?
NPU execution of Drama 3. The default deploy uses Model Runner V2, CUDA graphs, Triton sampling, FlashInfer GDN, and block-FP8 experts, and the NPU deploy loader rejected Model Runner V2.
3. How will this work move that variable?
Allow Model Runner V2 on the NPU AR worker, keep the Ascend GDN implementation, run the tower and sampler eagerly off CUDA, and load block-FP8 experts through the Ascend MoE method with a CPU expansion that avoids the failing in-place NPU copy.
4. Whose customer or user needs does this address, and what are those needs?
Operators who want to serve Fish Audio Drama 3 on Ascend NPUs. They need the existing speech API to start on NPU instead of being rejected at deploy-config load.
Purpose
Before:
fish_omni.yamlselects Model Runner V2 for stage 0, and loading that deploy on NPU raisedModel Runner V2 is not supported. The CUDA GDN/FlashInfer core and Triton tower kernels are not the Ascend path. CUDA's block-FP8 MoE method selects no Ascend kernel.After: the NPU AR worker builds the Omni V2 runner (with
torch.cudaaliased totorch.npu). Stage 0 stays on V2 and eager; the DAC stage stays on V1 on the next card. GDN is left on the Ascend patch. Tower norms and frame sampling use the eager path when the device is not CUDA. Routed experts useAscendFp8Config. On 910B those experts are expanded to bfloat16 on the CPU, because the in-place device copy raisesaclnnInplaceCopy561103, and the FP8 source is released before the dense copy is allocated.User-facing notes are in
recipes/fishaudio/Drama-3.mdand the online TTS guide. The supported-models table is unchanged: this is not a finished serving configuration.Test Plan
vLLM Version: 0.31.0 (container
quay.io/atlas-ci/vllm-ascend:v0.31.0)vLLM-Omni Commit:
a1c9b9e11onamy/drama3-npu(base03c334818)pytestof the new eager-kernel tests,bsgemm-moeCUDA and NPU routing tests, and the NPU deploy-config tests. 18 passed. The interpreter then aborted withcorrupted size vs. prev_size(exit 134) during process teardown; the same abort happens after a successful in-process import in this CANN environment.ASCEND_RT_VISIBLE_DEVICES=6,7, checkpoint/dataset/models/drama-3:Using MR v2 OmniARModelRunner on NPU.NPU out of memorywith 58.53 GiB already allocated while transposing the expanded bfloat16 expert weight (Tried to allocate 1.00 GiB).Test Result
Unit tests: 18 passed, then the known CANN shutdown abort.
Serving: the runner and weight load start. A 64 GB 910B cannot hold the bfloat16 expert expansion vLLM-Ascend uses for this block-FP8 checkpoint (Atlas 950 MXFP8 is not selected on 910B). Tensor parallel remains unsupported in the model. The recipe records that limit.
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