Enable support for prefill side kv_layout and block_size update

[yeonsily]

1. update example to support prefill HND and agreed_block_size
2. enable prefill side kv_layout and block_size update

Port vllm-project/vllm#30448 to vllm-gaudi

[xuechendi]

@yeonsily , I would suggest create a new nixl_connector file only for Gaudi to CUDA scenario instead of override current hpu_nixl_connector.py one.
The reason is upstream change is too fast, override so many function will fail in no time

[github-actions]

🚧 CI Blocked

The main CI workflow was not started for the following reason:

Your branch is behind the base branch. Please merge or rebase to get the latest changes.

[xuechendi]

Did you missed the switch for flag check and which nixl_connector.py to import

[yeonsily]

@xuechendi The change in hpu_nixl_connector is common regardless of heterogeneous run. And the ones in hetero_hpu_nixl_connector is extra for hetero.

[xuechendi]

@xuechendi The change in hpu_nixl_connector is common regardless of heterogeneous run. And the ones in hetero_hpu_nixl_connector is extra for hetero.

I see how to use VLLM_HPU_HETERO_KV_LAYOUT, was thinking to simply use VLLM_HPU_HETERO_KV_LAYOUT which file to import. But your approach also works

[yeonsily]

@xuechendi @michalkuligowski Thank you for your review! I see CI is failed but don't think it's from my side as my change won't trigger without the flag. It seems CI is broken now. Is there any way to re-trigger CI without commit any change?

[github-actions]

✅ CI Passed

All checks passed successfully against the following vllm commit:
6218034dd7f9a56596e4fd8c8c8fc1d8011ed9c2