[Doc][CPU binding] Add user/developer guide for CPU binding

[chenchuw886]

What this PR does / why we need it?

This PR adds comprehensive documentation for the CPU binding feature on Ascend NPUs. It includes:

• A detailed developer guide (docs/source/developer_guide/feature_guide/cpu_binding.md) covering the design, internal logic, allocation examples, and troubleshooting for the CPU binding mechanism.
• A concise user guide (docs/source/user_guide/feature_guide/cpu_binding.md) explaining the core concepts, usage, and common issues for end-users.
• An update to additional_config.md to use consistent terminology for binding strategies (global-slicing and topo-affinity).

This documentation is needed to help both developers and users understand, use, and debug the CPU binding feature, which is critical for performance on ARM+Ascend platforms.

Does this PR introduce any user-facing change?

No. This is a documentation-only update.

How was this patch tested?

The documentation has been reviewed for clarity and technical accuracy. The examples and descriptions align with the implementation in vllm_ascend/cpu_binding.py.

• vLLM version: v0.16.0
• vLLM main: vllm-project/vllm@4034c3d

[gemini-code-assist]

Summary of Changes

Hello, I'm Gemini Code Assist¹! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!

This pull request introduces comprehensive documentation for the CPU binding feature in vLLM Ascend. This feature is designed to optimize performance on ARM servers with Ascend NPUs by pinning worker processes and threads to specific CPU cores, thereby reducing cross-NUMA traffic and stabilizing inference latency. The documentation, split into developer and user guides, covers the design, allocation strategies, usage, and troubleshooting, providing users and developers with a clear guide to leverage this performance enhancement.

Highlights

• New CPU Binding Documentation (Developer Guide): A comprehensive developer guide for CPU binding has been added, detailing its design, execution flow, allocation examples, and technical references for vLLM Ascend on ARM systems.
• New CPU Binding Documentation (User Guide): A user-focused guide for CPU binding has been added, explaining core concepts, usage examples, troubleshooting, and limitations, including a Mermaid diagram for visual understanding.
• Updated Configuration Description: The description for the enable_cpu_binding configuration option has been updated to accurately reflect the CPU allocation strategies (global-slicing for A3 and topo-affinity for other device types).

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Changelog

• docs/source/developer_guide/feature_guide/cpu_binding.md
  • Added a detailed developer guide for CPU binding, covering its design, execution flow, allocation examples, and technical references.
• docs/source/user_guide/configuration/additional_config.md
  • Updated the description of the enable_cpu_binding configuration option to accurately reflect the CPU allocation strategies.
• docs/source/user_guide/feature_guide/cpu_binding.md
  • Added a user-focused guide for CPU binding, including core concepts, usage examples, troubleshooting, and limitations, along with a Mermaid diagram for the execution flow.

Activity

• No specific activity has been recorded for this pull request yet.

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[github-actions]

👋 Hi! Thank you for contributing to the vLLM Ascend project. The following points will speed up your PR merge:‌‌

• A PR should do only one thing, smaller PRs enable faster reviews.
• Every PR should include unit tests and end-to-end tests ‌to ensure it works and is not broken by other future PRs.
• Write the commit message by fulfilling the PR description to help reviewer and future developers understand.

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[gemini-code-assist]

Code Review

This pull request introduces comprehensive documentation for the CPU binding feature on Ascend NPUs, adding both a detailed developer guide and a concise user guide. The changes also include updating configuration documentation for consistency. The documentation is well-structured and accurately reflects the feature's implementation. As per the repository's style guide, I have provided a suggested PR title and summary below to improve the pull request's presentation.

Suggested PR Title:

[Doc][Misc] Add user and developer guides for CPU binding

Suggested PR Summary:

### What this PR does / why we need it?
This PR adds comprehensive documentation for the CPU binding feature on Ascend NPUs. It includes:

- A detailed developer guide (`docs/source/developer_guide/feature_guide/cpu_binding.md`) covering the design, internal logic, allocation examples, and troubleshooting for the CPU binding mechanism.
- A concise user guide (`docs/source/user_guide/feature_guide/cpu_binding.md`) explaining the core concepts, usage, and common issues for end-users.
- An update to `additional_config.md` to use consistent terminology for binding strategies (`global-slicing` and `topo-affinity`).

This documentation is needed to help both developers and users understand, use, and debug the CPU binding feature, which is critical for performance on ARM+Ascend platforms.

### Does this PR introduce _any_ user-facing change?
No. This is a documentation-only update.

### How was this patch tested?
The documentation has been reviewed for clarity and technical accuracy. The examples and descriptions align with the implementation in `vllm_ascend/cpu_binding.py`.

_{Note: Security Review has been skipped due to the limited scope of the PR.}