[Bugfix] [weight-sync] align colocated IPC coordinator/gather with vLLM engine slot - #57
[Bugfix] [weight-sync] align colocated IPC coordinator/gather with vLLM engine slot#57Meihan-chen wants to merge 1 commit into
Conversation
Signed-off-by: Meihan-chen <zr010426ztt@outlook.com>
There was a problem hiding this comment.
Code Review
This pull request updates the weight update logic from tensors to support contexts where CP/DP dimensions are present inside the same vLLM engine slot. It replaces Megatron's TP group gathering with gathering over the complete vLLM engine GPU slot, creating a new Gloo process group for this purpose. The review feedback suggests optimizing this process by conditionally creating the Gloo process group only when there are multiple ranks in the slot, avoiding unnecessary overhead for single-GPU engine slots.
| slot_ranks = list(range(start, end)) | ||
| slot_group = dist.new_group(ranks=slot_ranks, backend="gloo") |
There was a problem hiding this comment.
For single-GPU engine slots (len(slot_ranks) <= 1), creating a new Gloo process group is unnecessary since the IPC transfer path is bypassed (see the slot_size <= 1 fast path in _send_hf_chunk_via_ipc). Avoiding dist.new_group in this case prevents unnecessary resource allocation and overhead.
We can conditionally create the group only when len(slot_ranks) > 1.
| slot_ranks = list(range(start, end)) | |
| slot_group = dist.new_group(ranks=slot_ranks, backend="gloo") | |
| slot_ranks = list(range(start, end)) | |
| slot_group = dist.new_group(ranks=slot_ranks, backend="gloo") if len(slot_ranks) > 1 else None |
Summary
Related #56 (comment)
When the Megatron training topology does not match the colocated vLLM engine topology (e.g.
TP=4, CP=2, DP=1, EP=8trainer + one 8-GPU vLLM engine), the colocated CUDA-IPC weight-sync path made two assumptions that only hold when Megatron TP spans the entire vLLM engine slot. Both are now fixed.Coordinator selection (
connect_rollout_engines): the rank that issues/start_weight_updateand/finish_weight_updatewas chosen by Megatron TP rank 0, which is not unique inside a vLLM engine slot when CP/DP is present (e.g. ranks[0..7]withTP=4, CP=2have TP ranks[0,1,2,3,0,1,2,3]).This caused :
The coordinator is now the lowest global rank inside each engine GPU slot (
rank == start), which is unique by construction.IPC handle gather (
_send_hf_chunk_via_ipc): the all-gather of per-rank CUDA IPC payloads ran over Megatron's TP group, so the mergedupdate_infoonly carried GPU UUIDs for half of the vLLM TP=8 workers, producingA dedicated Gloo process group is now created per engine slot covering the full
[start, end)global rank range, and the gather + slot barrier run over that group. The merged payload now contains handles for every physical GPU UUID the colocated vLLM engine owns.Single-GPU-slot configurations are unaffected (the existing
slot_size <= 1fast path still usesIPCWeightTransferEngine.trainer_send_weightsdirectly).Test plan
tests/unit/backends/megatron_utils/update_weight/test_update_weight_from_tensor.pytests/test_qwen3_30B_A3B.pywithUSE_DEEPEP=0