Skip to content

Commit

Permalink
[M68k] Override CanLowerReturn to fix assertion with large return
Browse files Browse the repository at this point in the history
If it couldn't fit the return value in two registers, this caused an
error during codegen. It seems this method is implemented in other
backends but not here, and allows it to pass return values in memory
when it isn't able to do so in registers.

Seems to fix compilation of Rust code with certain return types:
rust-lang/rust#89498

Differential Revision: https://reviews.llvm.org/D148856
  • Loading branch information
ids1024 authored and veselypeta committed Aug 21, 2024
2 parents c7e6869 + 7452212 commit 382fbd3
Show file tree
Hide file tree
Showing 3 changed files with 33 additions and 0 deletions.
8 changes: 8 additions & 0 deletions llvm/lib/Target/M68k/M68kISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1058,6 +1058,14 @@ SDValue M68kTargetLowering::LowerFormalArguments(
// Return Value Calling Convention Implementation
//===----------------------------------------------------------------------===//

bool M68kTargetLowering::CanLowerReturn(
CallingConv::ID CCID, MachineFunction &MF, bool IsVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CCID, IsVarArg, MF, RVLocs, Context);
return CCInfo.CheckReturn(Outs, RetCC_M68k);
}

SDValue
M68kTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CCID,
bool IsVarArg,
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/M68k/M68kISelLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -257,6 +257,11 @@ class M68kTargetLowering : public TargetLowering {
SDValue LowerCall(CallLoweringInfo &CLI,
SmallVectorImpl<SDValue> &InVals) const override;

bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
LLVMContext &Context) const override;

/// Lower the result values of a call into the
/// appropriate copies out of appropriate physical registers.
SDValue LowerReturn(SDValue Chain, CallingConv::ID CCID, bool IsVarArg,
Expand Down
20 changes: 20 additions & 0 deletions llvm/test/CodeGen/M68k/multiple-return.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s

define { i32, i32, i32, i32 } @test() {
; CHECK-LABEL: test:
; CHECK: .cfi_startproc
; CHECK-NEXT: ; %bb.0: ; %start
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.l #23, (12,%a0)
; CHECK-NEXT: move.l #19, (8,%a0)
; CHECK-NEXT: move.l #17, (4,%a0)
; CHECK-NEXT: move.l #13, (%a0)
; CHECK-NEXT: move.l %a0, %d0
; CHECK-NEXT: move.l (%sp), %a1
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: move.l %a1, (%sp)
; CHECK-NEXT: rts
start:
ret { i32, i32, i32, i32 } { i32 13, i32 17, i32 19, i32 23 }
}

0 comments on commit 382fbd3

Please sign in to comment.