cpu: rv64: gemm: Implemented variable loop unrolling for GEMM#4258
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vpirogov merged 1 commit intouxlfoundation:mainfrom Dec 2, 2025
Merged
cpu: rv64: gemm: Implemented variable loop unrolling for GEMM#4258vpirogov merged 1 commit intouxlfoundation:mainfrom
vpirogov merged 1 commit intouxlfoundation:mainfrom
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dzarukin
reviewed
Nov 3, 2025
Co-authored-by: Fei Zhang <zhangfei@iscas.ac.cn>
dzarukin
approved these changes
Nov 21, 2025
vpirogov
approved these changes
Dec 2, 2025
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Hi @xiazhuozhao , I tested your code of
What do you think goes wrong on my tests? |
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Description
This implementation provides a variable loop unrolling GEMM implementation for the RISC-V platform, which significantly improves the performance of GEMM.
This change introduces logic to select an appropriate loop unrolling kernel based on the L1 cache size. This significantly improves matmul performance on devices with a 64KB L1 cache, while performance on 32KB devices will remain consistent with the #3785 implementation.
For context, the current RISC-V matmul implementation (#3784) is non-GEMM-based. While an efficient GEMM kernel was also implemented in #3785, the resulting GEMM-based matmul was not prioritized over #3784.
On a 64KB L1 cache device, this new implementation (#4258) achieves a significant average speedup of 23.69x over the current matmul (#3784) and 15.43x over the GEMM-based matmul from #3785.
performance data (The unit of data in the table is average GFLOPS, and the test command is
./benchdnn --mode=p --matmul --batch=inputs/matmul/perf_matmul_training.)Checklist
General
make testandmake test_benchdnn_*) pass locally for each commit?Performance improvements