Add FV3 changes to CI/CD workflow

.gitmodules

@@ -1,7 +1,7 @@
 [submodule "FV3"]
   path = FV3
-  url = https://github.com/NOAA-EMC/fv3atm
-  branch = develop
+  url = https://github.com/dpsarmie/fv3atm
+  branch = unit_test_concept_v2
 [submodule "WW3"]
   path = WW3
   url = https://github.com/NOAA-EMC/WW3

tests/test_changes.list

@@ -1,20 +1,179 @@
-cpld_control_gefs intel
-cpld_restart_gefs intel
-cpld_dcp_gefs intel
+cpld_control_p8_mixedmode intel
+cpld_control_gfsv17 intel
+cpld_control_gfsv17_iau intel
+cpld_restart_gfsv17 intel
+cpld_mpi_gfsv17 intel
+cpld_control_gfsv17_nowav_iau intel
+cpld_restart_gfsv17_nowav_iau intel
+cpld_control_sfs intel
+cpld_debug_gfsv17 intel
+cpld_control_p8 intel
+cpld_control_p8.v2.sfc intel
+cpld_restart_p8 intel
+cpld_control_qr_p8 intel
+cpld_restart_qr_p8 intel
+cpld_2threads_p8 intel
+cpld_decomp_p8 intel
+cpld_mpi_p8 intel
+cpld_control_ciceC_p8 intel
+cpld_control_c192_p8 intel
+cpld_restart_c192_p8 intel
+cpld_control_p8_lnd intel
+cpld_restart_p8_lnd intel
+cpld_s2sa_p8 intel
+cpld_control_noaero_p8 intel
+cpld_control_nowave_noaero_p8 intel
+cpld_debug_p8 intel
+cpld_debug_noaero_p8 intel
 cpld_control_noaero_p8_agrid intel
+cpld_control_p8_faster intel
+cpld_control_pdlib_p8 intel
+cpld_restart_pdlib_p8 intel
+cpld_mpi_pdlib_p8 intel
+cpld_control_c48_5deg intel
+cpld_warmstart_c48_5deg intel
+cpld_restart_c48_5deg intel
+cpld_debug_pdlib_p8 intel
+control_flake intel
+control_CubedSphereGrid intel
+control_CubedSphereGrid_parallel intel
+control_latlon intel
+control_wrtGauss_netcdf_parallel intel
+control_c48 intel
+control_c48.v2.sfc intel
+control_c48_lnd_iau intel
+control_c192 intel
+control_c384 intel
+control_c384gdas intel
+control_stochy intel
+control_stochy_restart intel
+control_lndp intel
+control_iovr4 intel
+control_iovr5 intel
+control_p8 intel
 control_p8.v2.sfc intel
+control_p8_ugwpv1 intel
+control_restart_p8 intel
+control_noqr_p8 intel
+control_restart_noqr_p8 intel
+control_decomp_p8 intel
+control_2threads_p8 intel
+control_p8_lndp intel
 control_p8_rrtmgp intel
 control_p8_mynn intel
 merra2_thompson intel
+regional_control intel
+regional_restart intel
+regional_decomp intel
+regional_2threads intel
+regional_noquilt intel
+regional_netcdf_parallel intel
+regional_2dwrtdecomp intel
+regional_wofs intel
+rap_control intel
+regional_spp_sppt_shum_skeb intel
+rap_decomp intel
+rap_2threads intel
+rap_restart intel
+rap_sfcdiff intel
+rap_sfcdiff_decomp intel
+rap_sfcdiff_restart intel
+hrrr_control intel
+hrrr_control_decomp intel
+hrrr_control_2threads intel
+hrrr_control_restart intel
+rrfs_v1beta intel
+rrfs_v1nssl intel
+rrfs_v1nssl_nohailnoccn intel
+control_csawmg intel
+control_ras intel
+control_wam intel
 control_p8_faster intel
+regional_control_faster intel
+control_CubedSphereGrid_debug intel
+control_wrtGauss_netcdf_parallel_debug intel
+control_stochy_debug intel
+control_lndp_debug intel
+control_csawmg_debug intel
+control_ras_debug intel
 control_diag_debug intel
+control_debug_p8 intel
+regional_debug intel
+rap_control_debug intel
+hrrr_control_debug intel
+hrrr_gf_debug intel
+hrrr_c3_debug intel
+rap_unified_drag_suite_debug intel
+rap_diag_debug intel
+rap_cires_ugwp_debug intel
+rap_unified_ugwp_debug intel
+rap_lndp_debug intel
+rap_progcld_thompson_debug intel
+rap_noah_debug intel
+rap_sfcdiff_debug intel
+rap_noah_sfcdiff_cires_ugwp_debug intel
+rrfs_v1beta_debug intel
+rap_clm_lake_debug intel
+rap_flake_debug intel
 gnv1_c96_no_nest_debug intel
+control_wam_debug intel
+regional_spp_sppt_shum_skeb_dyn32_phy32 intel
+rap_control_dyn32_phy32 intel
+hrrr_control_dyn32_phy32 intel
+rap_2threads_dyn32_phy32 intel
+hrrr_control_2threads_dyn32_phy32 intel
+hrrr_control_decomp_dyn32_phy32 intel
+rap_restart_dyn32_phy32 intel
+hrrr_control_restart_dyn32_phy32 intel
+conus13km_control intel
+conus13km_2threads intel
+conus13km_restart_mismatch intel
+rap_control_dyn64_phy32 intel
+rap_control_debug_dyn32_phy32 intel
+hrrr_control_debug_dyn32_phy32 intel
+conus13km_debug intel
+conus13km_debug_qr intel
+conus13km_debug_2threads intel
+conus13km_radar_tten_debug intel
+rap_control_dyn64_phy32_debug intel
+hafs_regional_atm intel
+hafs_regional_atm_thompson_gfdlsf intel
+hafs_regional_atm_ocn intel
+hafs_regional_atm_wav intel
+hafs_regional_1nest_atm intel
+hafs_regional_telescopic_2nests_atm intel
+hafs_global_1nest_atm intel
+hafs_global_multiple_4nests_atm intel
+hafs_regional_specified_moving_1nest_atm intel
+hafs_regional_storm_following_1nest_atm intel
+hafs_regional_storm_following_1nest_atm_ocn intel
+hafs_global_storm_following_1nest_atm intel
 gnv1_nested intel
+hafs_regional_storm_following_1nest_atm_ocn_debug intel
+hafs_regional_storm_following_1nest_atm_ocn_wav intel
+hafs_regional_storm_following_1nest_atm_ocn_wav_inline intel
+hafs_regional_storm_following_1nest_atm_ocn_wav_mom6 intel
+hafs_regional_docn intel
+hafs_regional_docn_oisst intel
+hafs_regional_datm_cdeps intel
+datm_cdeps_control_cfsr intel
+datm_cdeps_restart_cfsr intel
+datm_cdeps_control_gefs intel
+datm_cdeps_iau_gefs intel
+datm_cdeps_stochy_gefs intel
+datm_cdeps_ciceC_cfsr intel
+datm_cdeps_bulk_cfsr intel
+datm_cdeps_bulk_gefs intel
+datm_cdeps_mx025_cfsr intel
+datm_cdeps_mx025_gefs intel
+datm_cdeps_multiple_files_cfsr intel
+datm_cdeps_3072x1536_cfsr intel
+datm_cdeps_gfs intel
+datm_cdeps_debug_cfsr intel
+datm_cdeps_control_cfsr_faster intel
+datm_cdeps_lnd_gswp3 intel
+datm_cdeps_lnd_era5 intel
+datm_cdeps_lnd_era5_rst intel
+datm_cdeps_lm4_gswp3 intel
+datm_cdeps_lm4_gswp3_rst intel
 atm_ds2s_docn_pcice intel
-atmwav_control_noaero_p8 intel
-atmaero_control_p8 intel
-atmaero_control_p8_rad intel
-atmaero_control_p8_rad_micro intel
-control_c48 gnu
-control_diag_debug gnu
-gnv1_c96_no_nest_debug gnu