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fix macro anno error #34

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fix macro anno error #34

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donggyukim
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I just fixed an error, not a warning. We should use new annotation APIs in the end.

@edwardcwang Also barstools should be bumped in hammer?

@edwardcwang
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Seems fine overall, though I have 2 concerns for which it'd be good for us to talk about:

  1. Are we committed to relying on firrtl 1.2 (master) now, or do we want to rely on release versions of firrtl (currently 1.1)? I'm fine with us switching to firrtl 1.2 - would just be good to be explicit about that.
macros/src/main/scala/MacroCompiler.scala:720: type mismatch;
[error]  found   : Seq[firrtl.annotations.Annotation]
[error]  required: Option[firrtl.AnnotationMap]
[error]         val state = CircuitState(circuit, HighForm, annotations)
[error]                                                     ^
[error] one error found
[error] (macros/compile:compileIncremental) Compilation failed
  1. Seem like firrtl 1.2 (master) introduces stricter checks, whereas the same code passes with firrtl 1.1:
[info] barstools.macros.BOOMTest *** ABORTED ***
[info]   firrtl.passes.PassExceptions: firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_1_2 is not fully initialized.
[info]    : mem_1_2.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_1_0 is not fully initialized.
[info]    : mem_1_0.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_0_3 is not fully initialized.
[info]    : mem_0_3.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_0_1 is not fully initialized.
[info]    : mem_0_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_1_3 is not fully initialized.
[info]    : mem_1_3.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_1_1 is not fully initialized.
[info]    : mem_1_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_0_2 is not fully initialized.
[info]    : mem_0_2.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_182_ext]  Reference mem_0_0 is not fully initialized.
[info]    : mem_0_0.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_1_0 is not fully initialized.
[info]    : mem_1_0.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_2_0 is not fully initialized.
[info]    : mem_2_0.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_0_1 is not fully initialized.
[info]    : mem_0_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_3_0 is not fully initialized.
[info]    : mem_3_0.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_1_1 is not fully initialized.
[info]    : mem_1_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_2_1 is not fully initialized.
[info]    : mem_2_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_0_0 is not fully initialized.
[info]    : mem_0_0.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module _T_84_ext]  Reference mem_3_1 is not fully initialized.
[info]    : mem_3_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module entries_info_ext]  Reference mem_0_3 is not fully initialized.
[info]    : mem_0_3.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module entries_info_ext]  Reference mem_0_1 is not fully initialized.
[info]    : mem_0_1.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module entries_info_ext]  Reference mem_0_4 is not fully initialized.
[info]    : mem_0_4.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module entries_info_ext]  Reference mem_0_2 is not fully initialized.
[info]    : mem_0_2.I2 <= VOID
[info] firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module entries_info_ext]  Reference mem_0_0 is not fully initialized.
[info]    : mem_0_0.I2 <= VOID
[info] firrtl.passes.PassException: 21 errors detected!
[info]   at firrtl.passes.Errors.trigger(Passes.scala:45)
[info]   at firrtl.passes.CheckInitialization$.run(CheckInitialization.scala:92)
[info]   at firrtl.passes.Pass$class.execute(Passes.scala:24)
[info]   at firrtl.passes.CheckInitialization$.execute(CheckInitialization.scala:17)
[info]   at firrtl.Transform$$anonfun$2.apply(Compiler.scala:257)
[info]   at firrtl.Transform$$anonfun$2.apply(Compiler.scala:257)
[info]   at firrtl.Utils$.time(Utils.scala:182)
[info]   at firrtl.Transform.runTransform(Compiler.scala:257)
[info]   at firrtl.SeqTransformBased$$anonfun$runTransforms$1.apply(Compiler.scala:309)
[info]   at firrtl.SeqTransformBased$$anonfun$runTransforms$1.apply(Compiler.scala:309)

@edwardcwang
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As for hammer, yes, we should bump barstools at some point.

@donggyukim
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For 1, I think we should wait until firrtl 1.2 is released.

For 2, I don't see those issues with rocketchip master. How can I reproduce it?

@edwardcwang
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The error is reproducible by running sbt "project macros; test" with this commit + firrtl 1.2, I think.

@donggyukim
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We should update the firrtl files in the test later.

this matches port names from SynFlops and ReplSeqMem
otherwise, there'll be errors with unconnected ports
port.ports flatMap (p => p.direction match {
case Input =>
Some(IsInvalid(NoInfo, WSubField(WRef(name), p.name)))
case Output => None
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This looks like a good place for collect!

ports.collect { case Port(_, pname, Input, _) => IsInvalid(NoInfo, WSubField(WRef(name), pname)) }

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3 participants