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[Triton-MLIR][Backend] Revert a bug of smem allocation for non-scratch cvt_layout #697

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[Triton-MLIR][Backend] Revert a bug of smem allocation for non-scratch cvt_layout #697

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14 changes: 3 additions & 11 deletions lib/Analysis/Allocation.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,6 @@ getScratchConfigForCvtLayout(triton::gpu::ConvertLayoutOp op, unsigned &inVec,
return 0;
}
};
// blocked -> blocked
if (srcLayout.isa<BlockedEncodingAttr>() &&
dstLayout.isa<BlockedEncodingAttr>()) {
auto srcBlockedLayout = srcLayout.cast<BlockedEncodingAttr>();
Expand All @@ -66,14 +65,6 @@ getScratchConfigForCvtLayout(triton::gpu::ConvertLayoutOp op, unsigned &inVec,
}
paddedRepShape[outOrd[0]] += pad;
}
// blocked -> shared
if (srcLayout.isa<BlockedEncodingAttr>() &&
dstLayout.isa<SharedEncodingAttr>()) {
auto sharedLayout = dstLayout.cast<SharedEncodingAttr>();
for (int v : dstTy.getShape())
paddedRepShape.push_back(v);
}

return paddedRepShape;
}

Expand Down Expand Up @@ -140,8 +131,9 @@ class AllocationAnalysis {
auto dstTy = cvtLayout.result().getType().cast<RankedTensorType>();
auto srcEncoding = srcTy.getEncoding();
auto dstEncoding = dstTy.getEncoding();
if (srcEncoding.isa<SharedEncodingAttr>()) {
// only block->block and block->shared is supported now
if (srcEncoding.isa<SharedEncodingAttr>() ||
dstEncoding.isa<SharedEncodingAttr>()) {
// Only blocked -> blocked conversion requires for scratch allocation
return;
}
// ConvertLayoutOp with both input/output non-shared_layout
Expand Down
17 changes: 6 additions & 11 deletions lib/Conversion/TritonGPUToLLVM/TritonGPUToLLVM.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -585,12 +585,13 @@ class ConvertTritonGPUOpToLLVMPattern
return multiDimIdx;
}

template <typename T>
Value getSharedMemoryBase(Location loc, ConversionPatternRewriter &rewriter,
Value smem, const Allocation *allocation,
Operation *op) const {
T value) const {
auto ptrTy = LLVM::LLVMPointerType::get(
this->getTypeConverter()->convertType(rewriter.getIntegerType(8)), 3);
auto bufferId = allocation->getBufferId(op);
auto bufferId = allocation->getBufferId(value);
assert(bufferId != Allocation::InvalidBufferId && "BufferId not found");
size_t offset = allocation->getOffset(bufferId);
auto llvmIndexTy = this->getTypeConverter()->getIndexType();
Expand Down Expand Up @@ -1399,8 +1400,6 @@ struct ConvertLayoutOpConversion
if ((!srcLayout.isa<BlockedEncodingAttr>()) ||
(!dstLayout.isa<BlockedEncodingAttr>())) {
// TODO: not implemented
llvm::errs()
<< "convert_layout except for blocked -> blocked is not implemented";
return failure();
}
auto llvmElemTy = getTypeConverter()->convertType(dstTy.getElementType());
Expand Down Expand Up @@ -1996,12 +1995,6 @@ struct DotOpConversion : public ConvertTritonGPUOpToLLVMPattern<triton::DotOp> {
return failure();
}

Value getSmemAddr(Value value, Location loc,
ConversionPatternRewriter &rewriter) const {
return getSharedMemoryBase(loc, rewriter, smem, allocation,
value.getDefiningOp());
}

const Allocation *allocation;
Value smem;
};
Expand Down Expand Up @@ -2340,7 +2333,9 @@ DotOpConversion::convertMMA16816(triton::DotOp op, OpAdaptor adapter,
SmallVector<Value> ptrs(numPtrs);

Type smemPtrTy = helper.getShemPtrTy();
auto smemBase = getSmemAddr(tensor, loc, rewriter);
auto smemBase =
getSharedMemoryBase(loc, rewriter, smem, allocation, tensor);

for (int i = 0; i < numPtrs; i++) {
ptrs[i] = bit_cast(
smemPtrTy, gep(smemBase.getType(), smemBase, ValueRange({offs[i]})));
Expand Down