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[AMD] [FA] Hoist convert_layout to dotOp for Q out of the loop #6017
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,86 @@ | ||
| // RUN: triton-opt %s -split-input-file -tritonamdgpu-hoist-layout-conversions | FileCheck %s | ||
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| // Hoist convert_layout out of the loop since the defining op of the src is out of the loop | ||
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| #blocked = #ttg.blocked<{sizePerThread = [1, 8], threadsPerWarp = [8, 8], warpsPerCTA = [1, 1], order = [1, 0]}> | ||
| #mma = #ttg.amd_mfma<{versionMajor = 3, versionMinor = 0, warpsPerCTA = [1, 1], instrShape = [16, 16], isTransposed = true}> | ||
| #dotOp0 = #ttg.dot_op<{opIdx = 0, parent = #mma, kWidth = 8}> | ||
| #dotOp1 = #ttg.dot_op<{opIdx = 1, parent = #mma, kWidth = 8}> | ||
| // CHECK-LABEL: hoist_cvtToDotOp | ||
| // CHECK: %[[AF16:.*]] = arith.truncf | ||
| // CHECK-NEXT: %[[opA:.*]] = ttg.convert_layout %[[AF16]] | ||
| // CHECK-NEXT: scf.for | ||
| // CHECK: tt.dot %[[opA]] | ||
| module attributes {"ttg.num-warps" = 1 : i32, "ttg.threads-per-warp" = 64 : i32} { | ||
| tt.func public @hoist_cvtToDotOp(%opA: tensor<256x128xf32, #blocked>, %opB: tensor<128x256xf16, #dotOp1>, %C_ptr: tensor<256x256x!tt.ptr<f32>, #mma>) { | ||
| %c0 = arith.constant 0 : i32 | ||
| %c1 = arith.constant 1 : i32 | ||
| %cst = arith.constant dense<0.000000e+00> : tensor<256x256xf32, #mma> | ||
| %0 = arith.truncf %opA : tensor<256x128xf32, #blocked> to tensor<256x128xf16, #blocked> | ||
| %1:1 = scf.for %arg0 = %c0 to %c1 step %c1 iter_args(%arg1 = %cst) -> (tensor<256x256xf32, #mma>) : i32 { | ||
| %2 = ttg.convert_layout %0 : tensor<256x128xf16, #blocked> -> tensor<256x128xf16, #dotOp0> | ||
| %3 = tt.dot %2, %opB, %arg1 : tensor<256x128xf16, #dotOp0> * tensor<128x256xf16, #dotOp1> -> tensor<256x256xf32, #mma> | ||
| scf.yield %3 : tensor<256x256xf32, #mma> | ||
| } | ||
| tt.store %C_ptr, %1#0: tensor<256x256x!tt.ptr<f32>, #mma> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // Keep convert_layout inside the loop since the defining op of the src is inside the loop | ||
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| #blocked = #ttg.blocked<{sizePerThread = [1, 8], threadsPerWarp = [8, 8], warpsPerCTA = [1, 1], order = [1, 0]}> | ||
| #mma = #ttg.amd_mfma<{versionMajor = 3, versionMinor = 0, warpsPerCTA = [1, 1], instrShape = [16, 16], isTransposed = true}> | ||
| #dotOp0 = #ttg.dot_op<{opIdx = 0, parent = #mma, kWidth = 8}> | ||
| #dotOp1 = #ttg.dot_op<{opIdx = 1, parent = #mma, kWidth = 8}> | ||
| // CHECK-LABEL: defOp_in_loop | ||
| // CHECK: scf.for | ||
| // CHECK: %[[AF16:.*]] = arith.truncf | ||
| // CHECK-NEXT: %[[opA:.*]] = ttg.convert_layout %[[AF16]] | ||
| // CHECK: tt.dot %[[opA]] | ||
| module attributes {"ttg.num-warps" = 1 : i32, "ttg.threads-per-warp" = 64 : i32} { | ||
| tt.func public @defOp_in_loop(%opA: tensor<256x128xf32, #blocked>, %opB: tensor<128x256xf16, #dotOp1>, %C_ptr: tensor<256x256x!tt.ptr<f32>, #mma>) { | ||
| %c0 = arith.constant 0 : i32 | ||
| %c1 = arith.constant 1 : i32 | ||
| %cst = arith.constant dense<0.000000e+00> : tensor<256x256xf32, #mma> | ||
| %1:1 = scf.for %arg0 = %c0 to %c1 step %c1 iter_args(%arg1 = %cst) -> (tensor<256x256xf32, #mma>) : i32 { | ||
| %0 = arith.truncf %opA : tensor<256x128xf32, #blocked> to tensor<256x128xf16, #blocked> | ||
| %2 = ttg.convert_layout %0 : tensor<256x128xf16, #blocked> -> tensor<256x128xf16, #dotOp0> | ||
| %3 = tt.dot %2, %opB, %arg1 : tensor<256x128xf16, #dotOp0> * tensor<128x256xf16, #dotOp1> -> tensor<256x256xf32, #mma> | ||
| scf.yield %3 : tensor<256x256xf32, #mma> | ||
| } | ||
| tt.store %C_ptr, %1#0: tensor<256x256x!tt.ptr<f32>, #mma> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // Keep convert_layout inside the loop since the defining op is a block argument of the loop | ||
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| #blocked = #ttg.blocked<{sizePerThread = [1, 8], threadsPerWarp = [8, 8], warpsPerCTA = [1, 1], order = [1, 0]}> | ||
| #mma = #ttg.amd_mfma<{versionMajor = 3, versionMinor = 0, warpsPerCTA = [1, 1], instrShape = [16, 16], isTransposed = true}> | ||
| #dotOp0 = #ttg.dot_op<{opIdx = 0, parent = #mma, kWidth = 8}> | ||
| #dotOp1 = #ttg.dot_op<{opIdx = 1, parent = #mma, kWidth = 8}> | ||
| // CHECK-LABEL: defOp_blockArg | ||
| // CHECK: scf.for | ||
| // CHECK-NEXT: %[[opA:.*]] = ttg.convert_layout | ||
| // CHECK: tt.dot %[[opA]] | ||
| module attributes {"ttg.num-warps" = 1 : i32, "ttg.threads-per-warp" = 64 : i32} { | ||
| tt.func public @defOp_blockArg(%opA: tensor<256x128xf16, #blocked>, %opB: tensor<128x256xf16, #dotOp1>, %C_ptr: tensor<256x256x!tt.ptr<f32>, #mma>) { | ||
| %c0 = arith.constant 0 : i32 | ||
| %c1 = arith.constant 1 : i32 | ||
| %cst = arith.constant dense<0.000000e+00> : tensor<256x256xf32, #mma> | ||
| %1:2 = scf.for %arg0 = %c0 to %c1 step %c1 iter_args(%arg1 = %cst, %arg2 = %opA) -> (tensor<256x256xf32, #mma>, tensor<256x128xf16, #blocked>) : i32 { | ||
| %2 = ttg.convert_layout %arg2 : tensor<256x128xf16, #blocked> -> tensor<256x128xf16, #dotOp0> | ||
| %3 = tt.dot %2, %opB, %arg1 : tensor<256x128xf16, #dotOp0> * tensor<128x256xf16, #dotOp1> -> tensor<256x256xf32, #mma> | ||
| scf.yield %3, %arg2 : tensor<256x256xf32, #mma>, tensor<256x128xf16, #blocked> | ||
| } | ||
| tt.store %C_ptr, %1#0: tensor<256x256x!tt.ptr<f32>, #mma> | ||
| tt.return | ||
| } | ||
| } |
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63 changes: 63 additions & 0 deletions
63
third_party/amd/lib/TritonAMDGPUTransforms/HoistLayoutConversions.cpp
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,63 @@ | ||
| #include "TritonAMDGPUTransforms/Passes.h" | ||
| #include "mlir/IR/Matchers.h" | ||
| #include "mlir/IR/PatternMatch.h" | ||
| #include "mlir/Pass/Pass.h" | ||
| #include "mlir/Pass/PassManager.h" | ||
| #include "mlir/Support/LogicalResult.h" | ||
| #include "mlir/Transforms/GreedyPatternRewriteDriver.h" | ||
| #include "mlir/Transforms/Passes.h" | ||
| #include "triton/Dialect/TritonGPU/IR/Dialect.h" | ||
| #include "triton/Dialect/TritonGPU/Transforms/Passes.h" | ||
| #include "triton/Dialect/TritonGPU/Transforms/Utility.h" | ||
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| using namespace mlir; | ||
| namespace tt = mlir::triton; | ||
| namespace ttg = mlir::triton::gpu; | ||
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| // Hoist convert_layout out of the loop if the src is defined out of the loop. | ||
| // This is a heuristic driven by optimizing fused attention kernels, in which | ||
| // we want to load Q tensor and keep it in register, instead of loading it | ||
| // (neither from global or shared memory) at every iteration of the loop. | ||
| static void hoistCvtDotOpOutOfLoop(ttg::ConvertLayoutOp cvtOp) { | ||
|
zhanglx13 marked this conversation as resolved.
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| // Check the dst of cvt has dotOperand layout | ||
| RankedTensorType rtType = dyn_cast<RankedTensorType>(cvtOp.getType()); | ||
| if (!rtType) | ||
| return; | ||
| Attribute encoding = rtType.getEncoding(); | ||
| if (!encoding) | ||
| return; | ||
| if (!isa<ttg::DotOperandEncodingAttr>(encoding)) | ||
| return; | ||
| // Check the src of cvt is defined out of the loop | ||
| auto srcDefOp = cvtOp.getSrc().getDefiningOp(); | ||
| if (srcDefOp) { | ||
| scf::ForOp parentForOp = cvtOp->getParentOfType<scf::ForOp>(); | ||
| if (parentForOp && !parentForOp->isAncestor(srcDefOp)) { | ||
| cvtOp->moveAfter(srcDefOp); | ||
| } | ||
| } | ||
| } | ||
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| #define GEN_PASS_CLASSES | ||
| #include "TritonAMDGPUTransforms/Passes.h.inc" | ||
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| namespace { | ||
| struct TritonAMDGPUHoistLayoutConversionsPass | ||
| : public TritonAMDGPUHoistLayoutConversionsBase< | ||
| TritonAMDGPUHoistLayoutConversionsPass> { | ||
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| void runOnOperation() override { | ||
| tt::FuncOp funcOp = getOperation(); | ||
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| SmallVector<ttg::ConvertLayoutOp> cvtOps; | ||
| funcOp.walk([&](ttg::ConvertLayoutOp cvtOp) { cvtOps.push_back(cvtOp); }); | ||
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| for (auto cvtOp : cvtOps) | ||
| hoistCvtDotOpOutOfLoop(cvtOp); | ||
| } | ||
| }; | ||
| } // namespace | ||
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| std::unique_ptr<Pass> mlir::createTritonAMDGPUHoistLayoutConversionsPass() { | ||
| return std::make_unique<TritonAMDGPUHoistLayoutConversionsPass>(); | ||
| } | ||
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