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[AMD] Pipeline small vector width but not thru shared memory#5227

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sjw36 wants to merge 1 commit intotriton-lang:mainfrom
ROCm:sjw/pipeline-small-buffers-in-register
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[AMD] Pipeline small vector width but not thru shared memory#5227
sjw36 wants to merge 1 commit intotriton-lang:mainfrom
ROCm:sjw/pipeline-small-buffers-in-register

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@sjw36 sjw36 commented Nov 22, 2024

Allow pipelining in register buffers for dot inputs with small vector width.

@chris002oak

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Comment thread third_party/amd/lib/TritonAMDGPUTransforms/StreamPipelineV2.cpp Outdated
Comment thread test/TritonGPU/foo.mlir Outdated
    - applies to dot inputs as well
@sjw36 sjw36 force-pushed the sjw/pipeline-small-buffers-in-register branch from 47aeb2f to 810dd41 Compare November 25, 2024 14:45
@antiagainst antiagainst closed this Dec 4, 2024
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3 participants