Layout conversion bypass for blocked to dotOperand #4538
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| Original file line number | Diff line number | Diff line change |
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| @@ -1,33 +1,105 @@ | ||
| // RUN: triton-opt %s --split-input-file --decompose-unsupported-amd-conversions | FileCheck %s | ||
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| // CHECK: #[[$BLOCKED:.+]] = #triton_gpu.blocked<{{.*}}> | ||
| // CHECK: #[[$WMMA:.+]] = #triton_gpu.amd_wmma<{{.*}}> | ||
| // CHECK: #[[$SHARED:.+]] = #triton_gpu.shared<{{.*}}> | ||
| // CHECK-LABEL: wmma_to_wmma_dot_op | ||
| #mma = #triton_gpu.amd_wmma<{version = 1, warpsPerCTA = [2, 2]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx1130", "triton_gpu.threads-per-warp" = 32 : i32} { | ||
| tt.func @wmma_to_wmma_dot_op(%arg0: tensor<16x16xf16, #mma>) { | ||
| // CHECK: %[[SRC_BLOCKED:.+]] = triton_gpu.convert_layout %{{.*}} : tensor<16x16xf16, #[[$WMMA]]> -> tensor<16x16xf16, #[[$BLOCKED]]> | ||
| // CHECK-NEXT: %[[INT_SHARED:.+]] = triton_gpu.local_alloc %[[SRC_BLOCKED]] : {{.*}} -> !tt.memdesc<16x16xf16, #[[$SHARED]], #triton_gpu.shared_memory> | ||
| // CHECK-NEXT: %[[DST_DOT_OP:.+]] = triton_gpu.local_load %[[INT_SHARED]] : {{.*}} -> tensor<16x16xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #[[$WMMA]], kWidth = 16}>> | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<16x16xf16, #mma> -> tensor<16x16xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #mma, kWidth = 16}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK: #[[$BLOCKED:.+]] = #triton_gpu.blocked<{{.*}}> | ||
| // CHECK: #[[$WMMA:.+]] = #triton_gpu.amd_wmma<{{.*}}> | ||
| // CHECK: #[[$SHARED:.+]] = #triton_gpu.shared<{{.*}}> | ||
| // CHECK-LABEL: wmma_to_wmma_dot3d_op | ||
| #mma = #triton_gpu.amd_wmma<{version = 1, warpsPerCTA = [2, 2, 2]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} { | ||
| tt.func @wmma_to_wmma_dot3d_op(%arg0: tensor<2x16x16xf16, #mma>) { | ||
| // CHECK: %[[SRC_BLOCKED:.+]] = triton_gpu.convert_layout %{{.*}} : tensor<2x16x16xf16, #[[$WMMA]]> -> tensor<2x16x16xf16, #[[$BLOCKED]]> | ||
| // CHECK-NEXT: %[[INT_SHARED:.+]] = triton_gpu.local_alloc %[[SRC_BLOCKED]] : {{.*}} -> !tt.memdesc<2x16x16xf16, #[[$SHARED]], #triton_gpu.shared_memory> | ||
| // CHECK-NEXT: %[[DST_DOT_OP:.+]] = triton_gpu.local_load %[[INT_SHARED]] : {{.*}} -> tensor<2x16x16xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #[[$WMMA]], kWidth = 16}>> | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<2x16x16xf16, #mma> -> tensor<2x16x16xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #mma, kWidth = 16}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: blocked_to_dot_op_shortcut_gfx1130 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 32], threadsPerWarp = [32, 1], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx1130", "triton_gpu.threads-per-warp" = 32 : i32} { | ||
| tt.func @blocked_to_dot_op_shortcut_gfx1130(%arg0: tensor<32x32xf16, #blocked>) { | ||
| // CHECK-NOT: triton_gpu.local_alloc | ||
| // CHECK: triton_gpu.convert_layout | ||
| // CHECK-NOT: triton_gpu.local_alloc | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #blocked}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: blocked_to_dot_op_shortcut_gfx940 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 32], threadsPerWarp = [32, 2], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx940", "triton_gpu.threads-per-warp" = 64 : i32} { | ||
| tt.func @blocked_to_dot_op_shortcut_gfx940(%arg0: tensor<32x32xf16, #blocked>) { | ||
| // CHECK-NOT: triton_gpu.local_alloc | ||
| // CHECK: triton_gpu.convert_layout | ||
| // CHECK-NOT: triton_gpu.local_alloc | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #blocked}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: neg_blocked_to_dot_op_incompatible_elems_gfx940 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 16], threadsPerWarp = [32, 2], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx940", "triton_gpu.threads-per-warp" = 64 : i32} { | ||
| tt.func @neg_blocked_to_dot_op_incompatible_elems_gfx940(%arg0: tensor<32x32xf16, #blocked>) { | ||
| // CHECK-NOT: triton_gpu.convert_layout | ||
| // CHECK: triton_gpu.local_alloc | ||
| // CHECK: triton_gpu.local_load | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #blocked}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: neg_blocked_to_dot_op_incompatible_threads_gfx940 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 32], threadsPerWarp = [32, 2], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| #blocked1 = #triton_gpu.blocked<{sizePerThread = [1, 32], threadsPerWarp = [16, 4], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx940", "triton_gpu.threads-per-warp" = 64 : i32} { | ||
| tt.func @neg_blocked_to_dot_op_incompatible_threads_gfx940(%arg0: tensor<32x32xf16, #blocked>) { | ||
| // CHECK-NOT: triton_gpu.convert_layout | ||
| // CHECK: triton_gpu.local_alloc | ||
| // CHECK: triton_gpu.local_load | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #blocked1}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: neg_blocked_to_dot_op_incompatible_warp_gfx940 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 32], threadsPerWarp = [32, 2], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| #blocked1 = #triton_gpu.blocked<{sizePerThread = [1, 32], threadsPerWarp = [32, 2], warpsPerCTA = [4, 1], order = [1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx940", "triton_gpu.threads-per-warp" = 64 : i32} { | ||
| tt.func @neg_blocked_to_dot_op_incompatible_warp_gfx940(%arg0: tensor<32x32xf16, #blocked>) { | ||
| // CHECK-NOT: triton_gpu.convert_layout | ||
| // CHECK: triton_gpu.local_alloc | ||
| // CHECK: triton_gpu.local_load | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #blocked1}>> | ||
| tt.return | ||
| } | ||
| } | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,47 @@ | ||
| // RUN: triton-opt %s -split-input-file --allocate-shared-memory --convert-triton-gpu-to-llvm | FileCheck %s | ||
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| // CHECK-LABEL: blocked_to_dot_op_shortcut_warp32 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [32, 1], threadsPerWarp = [1, 32], warpsPerCTA = [2, 2], order = [0, 1]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "cuda:80", "triton_gpu.threads-per-warp" = 32 : i32} { | ||
| tt.func @blocked_to_dot_op_shortcut_warp32(%arg0: tensor<32x32xf16, #blocked>, %arg1: tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #blocked}>>) { | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 1, parent = #blocked}>> | ||
| // CHECK-NOT: load | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: blocked_to_dot_op_shortcut_warp64 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [32, 1], threadsPerWarp = [2, 32], warpsPerCTA = [2, 2], order = [1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx940", "triton_gpu.threads-per-warp" = 64 : i32} { | ||
| tt.func @blocked_to_dot_op_shortcut_warp64(%arg0: tensor<32x32xf16, #blocked>) { | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<32x32xf16, #blocked> -> tensor<32x32xf16, #triton_gpu.dot_op<{opIdx = 1, parent = #blocked}>> | ||
| // CHECK-NOT: load | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: blocked_to_dot3d_op_shortcut_warp32 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [2, 32, 1], threadsPerWarp = [1, 1, 32], warpsPerCTA = [2, 1, 2], order = [1, 2, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "cuda:80", "triton_gpu.threads-per-warp" = 32 : i32} { | ||
| tt.func @blocked_to_dot3d_op_shortcut_warp32(%arg0: tensor<8x32x32xf16, #blocked>) { | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<8x32x32xf16, #blocked> -> tensor<8x32x32xf16, #triton_gpu.dot_op<{opIdx = 1, parent = #blocked}>> | ||
| // CHECK-NOT: load | ||
| tt.return | ||
| } | ||
| } | ||
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| // ----- | ||
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| // CHECK-LABEL: blocked_to_dot3d_op_shortcut_warp64 | ||
| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 32, 1], threadsPerWarp = [1, 2, 32], warpsPerCTA = [2, 2, 1], order = [2, 1, 0]}> | ||
| module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, triton_gpu.target = "hip:gfx940", "triton_gpu.threads-per-warp" = 64 : i32} { | ||
| tt.func @blocked_to_dot3d_op_shortcut_warp64(%arg0: tensor<8x32x32xf16, #blocked>) { | ||
| %0 = triton_gpu.convert_layout %arg0 : tensor<8x32x32xf16, #blocked> -> tensor<8x32x32xf16, #triton_gpu.dot_op<{opIdx = 1, parent = #blocked}>> | ||
| // CHECK-NOT: load | ||
| tt.return | ||
| } | ||
| } |
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One issue we have in the codebase is lots of mysterious layout/indexing--it's not easy for others reading the code to pick up the intent. The following might not be that tricky; but still can we add a comment to explain what the following checks are doing in a high level?
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Thanks for adding the comments! but the wording is quite confusing to me right now. What about something like
The following logic checks that a source blocked layout B matches a destination dot operand layout with blocked layout parent P. It's considered match if 1) each thread holds a whole copy of all elements along the K dimension for B, and 2) distribution along all other non-K dimensions match between S and B. This is to guarantee that each thread have all the data needed for reduction without exchange with other threads. (And/or whatever other reasons why we want this kind of match.)