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[Backend][AMD] Improve instruction reordering#4406

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antiagainst wants to merge 3 commits intotriton-lang:mainfrom
ROCm:lei-inst-reorder
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[Backend][AMD] Improve instruction reordering#4406
antiagainst wants to merge 3 commits intotriton-lang:mainfrom
ROCm:lei-inst-reorder

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This commit improves instruction reodering pass to move
tt.load early in the loop body to enable issuing memory
operations for the next tile earlier.

This commit is a next step after the new pipeliner
#4148.

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