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5d8115e
Successful rendering of SM83 CPU
msinger Nov 20, 2025
d27c483
SM83: Assign node names
msinger Nov 20, 2025
f3e17a9
SM83: Initalize CPU
msinger Nov 20, 2025
40ab100
SM83: Add transistor terminal widths
msinger Nov 21, 2025
d75b106
SM83: Add node areas for capacitive merges
msinger Nov 21, 2025
ca4640f
SM83: Fetches first instruction
msinger Nov 21, 2025
2cdf07f
SM83: Fix opcode disassembly
msinger Nov 21, 2025
defa004
SM83: Some progress with instruction register
msinger Nov 21, 2025
aa0720e
SM83: Successfully executes instructions
msinger Nov 22, 2025
32b8b41
SM83: Use only valid instructions in testprogram
msinger Nov 22, 2025
95a643a
SM83: Add source links
msinger Nov 22, 2025
7fc219b
SM83: Fix comparison of driving strengths
msinger Nov 23, 2025
1ba3052
SM83: Re-evaluate clocks when halt_n changes
msinger Nov 23, 2025
13d7a55
SM83: Fix displaying flags
msinger Nov 23, 2025
e3a2310
SM83: Optimize/cleanup CPU init
msinger Nov 23, 2025
f9714ce
SM83: Add NBA list
msinger Nov 23, 2025
8528dec
SM83: Add description for segdefs and transdefs
msinger Nov 23, 2025
1829f22
SM83: Fix selecting nodes with id>=4096
msinger Nov 25, 2025
8bdce50
SM83: Add node names
msinger Nov 25, 2025
66094f2
SM83: Fix transistor strength calculation
msinger Nov 26, 2025
cf329e0
SM83: Update node names
msinger Nov 28, 2025
74991e0
SM83: Add T tick to table
msinger Dec 1, 2025
7d2a7f1
SM83: Update layout
msinger Dec 2, 2025
79dac64
SM83: Update node names for all ALU inputs
msinger Dec 4, 2025
538fcaa
SM83: Update node names for all reg bank inputs
msinger Dec 7, 2025
8cff7f8
SM83: Name all remaining control signals
msinger Dec 8, 2025
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302 changes: 302 additions & 0 deletions chip-sm83/nbanodes.js
Original file line number Diff line number Diff line change
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// List of flip-flop stages that need to be handled like non-blocking assignments (NBA).
var nbaNodes = new Array();
nbaNodes[1117] = 1; // reg_ir[0] stage1
nbaNodes[1082] = 1; // reg_ir[0] stage2
nbaNodes[1235] = 1; // reg_ir[1] stage1
nbaNodes[1196] = 1; // reg_ir[1] stage2
nbaNodes[1353] = 1; // reg_ir[2] stage1
nbaNodes[1318] = 1; // reg_ir[2] stage2
nbaNodes[1467] = 1; // reg_ir[3] stage1
nbaNodes[1436] = 1; // reg_ir[3] stage2
nbaNodes[1588] = 1; // reg_ir[4] stage1
nbaNodes[1553] = 1; // reg_ir[4] stage2
nbaNodes[1708] = 1; // reg_ir[5] stage1
nbaNodes[1669] = 1; // reg_ir[5] stage2
nbaNodes[1827] = 1; // reg_ir[6] stage1
nbaNodes[1792] = 1; // reg_ir[6] stage2
nbaNodes[1939] = 1; // reg_ir[7] stage1
nbaNodes[1909] = 1; // reg_ir[7] stage2
nbaNodes[1111] = 1; // reg_a[0] stage1
nbaNodes[1076] = 1; // reg_a[0] stage2
nbaNodes[1229] = 1; // reg_a[1] stage1
nbaNodes[1190] = 1; // reg_a[1] stage2
nbaNodes[1347] = 1; // reg_a[2] stage1
nbaNodes[1312] = 1; // reg_a[2] stage2
nbaNodes[1455] = 1; // reg_a[3] stage1
nbaNodes[1430] = 1; // reg_a[3] stage2
nbaNodes[1582] = 1; // reg_a[4] stage1
nbaNodes[1547] = 1; // reg_a[4] stage2
nbaNodes[1702] = 1; // reg_a[5] stage1
nbaNodes[1663] = 1; // reg_a[5] stage2
nbaNodes[1821] = 1; // reg_a[6] stage1
nbaNodes[1786] = 1; // reg_a[6] stage2
nbaNodes[1927] = 1; // reg_a[7] stage1
nbaNodes[1903] = 1; // reg_a[7] stage2
nbaNodes[1118] = 1; // reg_l[0] stage1
nbaNodes[1083] = 1; // reg_l[0] stage2
nbaNodes[1236] = 1; // reg_l[1] stage1
nbaNodes[1197] = 1; // reg_l[1] stage2
nbaNodes[1354] = 1; // reg_l[2] stage1
nbaNodes[1319] = 1; // reg_l[2] stage2
nbaNodes[1469] = 1; // reg_l[3] stage1
nbaNodes[1437] = 1; // reg_l[3] stage2
nbaNodes[1589] = 1; // reg_l[4] stage1
nbaNodes[1554] = 1; // reg_l[4] stage2
nbaNodes[1709] = 1; // reg_l[5] stage1
nbaNodes[1670] = 1; // reg_l[5] stage2
nbaNodes[1828] = 1; // reg_l[6] stage1
nbaNodes[1793] = 1; // reg_l[6] stage2
nbaNodes[1941] = 1; // reg_l[7] stage1
nbaNodes[1910] = 1; // reg_l[7] stage2
nbaNodes[1116] = 1; // reg_h[0] stage1
nbaNodes[1081] = 1; // reg_h[0] stage2
nbaNodes[1234] = 1; // reg_h[1] stage1
nbaNodes[1195] = 1; // reg_h[1] stage2
nbaNodes[1352] = 1; // reg_h[2] stage1
nbaNodes[1317] = 1; // reg_h[2] stage2
nbaNodes[1465] = 1; // reg_h[3] stage1
nbaNodes[1435] = 1; // reg_h[3] stage2
nbaNodes[1587] = 1; // reg_h[4] stage1
nbaNodes[1552] = 1; // reg_h[4] stage2
nbaNodes[1707] = 1; // reg_h[5] stage1
nbaNodes[1668] = 1; // reg_h[5] stage2
nbaNodes[1826] = 1; // reg_h[6] stage1
nbaNodes[1791] = 1; // reg_h[6] stage2
nbaNodes[1937] = 1; // reg_h[7] stage1
nbaNodes[1908] = 1; // reg_h[7] stage2
nbaNodes[1115] = 1; // reg_e[0] stage1
nbaNodes[1080] = 1; // reg_e[0] stage2
nbaNodes[1233] = 1; // reg_e[1] stage1
nbaNodes[1194] = 1; // reg_e[1] stage2
nbaNodes[1351] = 1; // reg_e[2] stage1
nbaNodes[1316] = 1; // reg_e[2] stage2
nbaNodes[1463] = 1; // reg_e[3] stage1
nbaNodes[1434] = 1; // reg_e[3] stage2
nbaNodes[1586] = 1; // reg_e[4] stage1
nbaNodes[1551] = 1; // reg_e[4] stage2
nbaNodes[1706] = 1; // reg_e[5] stage1
nbaNodes[1667] = 1; // reg_e[5] stage2
nbaNodes[1825] = 1; // reg_e[6] stage1
nbaNodes[1790] = 1; // reg_e[6] stage2
nbaNodes[1935] = 1; // reg_e[7] stage1
nbaNodes[1907] = 1; // reg_e[7] stage2
nbaNodes[1114] = 1; // reg_d[0] stage1
nbaNodes[1079] = 1; // reg_d[0] stage2
nbaNodes[1232] = 1; // reg_d[1] stage1
nbaNodes[1193] = 1; // reg_d[1] stage2
nbaNodes[1350] = 1; // reg_d[2] stage1
nbaNodes[1315] = 1; // reg_d[2] stage2
nbaNodes[1461] = 1; // reg_d[3] stage1
nbaNodes[1433] = 1; // reg_d[3] stage2
nbaNodes[1585] = 1; // reg_d[4] stage1
nbaNodes[1550] = 1; // reg_d[4] stage2
nbaNodes[1705] = 1; // reg_d[5] stage1
nbaNodes[1666] = 1; // reg_d[5] stage2
nbaNodes[1824] = 1; // reg_d[6] stage1
nbaNodes[1789] = 1; // reg_d[6] stage2
nbaNodes[1933] = 1; // reg_d[7] stage1
nbaNodes[1906] = 1; // reg_d[7] stage2
nbaNodes[1113] = 1; // reg_c[0] stage1
nbaNodes[1078] = 1; // reg_c[0] stage2
nbaNodes[1231] = 1; // reg_c[1] stage1
nbaNodes[1192] = 1; // reg_c[1] stage2
nbaNodes[1349] = 1; // reg_c[2] stage1
nbaNodes[1314] = 1; // reg_c[2] stage2
nbaNodes[1459] = 1; // reg_c[3] stage1
nbaNodes[1432] = 1; // reg_c[3] stage2
nbaNodes[1584] = 1; // reg_c[4] stage1
nbaNodes[1549] = 1; // reg_c[4] stage2
nbaNodes[1704] = 1; // reg_c[5] stage1
nbaNodes[1665] = 1; // reg_c[5] stage2
nbaNodes[1823] = 1; // reg_c[6] stage1
nbaNodes[1788] = 1; // reg_c[6] stage2
nbaNodes[1931] = 1; // reg_c[7] stage1
nbaNodes[1905] = 1; // reg_c[7] stage2
nbaNodes[1112] = 1; // reg_b[0] stage1
nbaNodes[1077] = 1; // reg_b[0] stage2
nbaNodes[1230] = 1; // reg_b[1] stage1
nbaNodes[1191] = 1; // reg_b[1] stage2
nbaNodes[1348] = 1; // reg_b[2] stage1
nbaNodes[1313] = 1; // reg_b[2] stage2
nbaNodes[1457] = 1; // reg_b[3] stage1
nbaNodes[1431] = 1; // reg_b[3] stage2
nbaNodes[1583] = 1; // reg_b[4] stage1
nbaNodes[1548] = 1; // reg_b[4] stage2
nbaNodes[1703] = 1; // reg_b[5] stage1
nbaNodes[1664] = 1; // reg_b[5] stage2
nbaNodes[1822] = 1; // reg_b[6] stage1
nbaNodes[1787] = 1; // reg_b[6] stage2
nbaNodes[1929] = 1; // reg_b[7] stage1
nbaNodes[1904] = 1; // reg_b[7] stage2
nbaNodes[1120] = 1; // reg_z[0] stage1
nbaNodes[1086] = 1; // reg_z[0] stage2
nbaNodes[1238] = 1; // reg_z[1] stage1
nbaNodes[1204] = 1; // reg_z[1] stage2
nbaNodes[1356] = 1; // reg_z[2] stage1
nbaNodes[1322] = 1; // reg_z[2] stage2
nbaNodes[1473] = 1; // reg_z[3] stage1
nbaNodes[1440] = 1; // reg_z[3] stage2
nbaNodes[1591] = 1; // reg_z[4] stage1
nbaNodes[1557] = 1; // reg_z[4] stage2
nbaNodes[1711] = 1; // reg_z[5] stage1
nbaNodes[1677] = 1; // reg_z[5] stage2
nbaNodes[1830] = 1; // reg_z[6] stage1
nbaNodes[1796] = 1; // reg_z[6] stage2
nbaNodes[1945] = 1; // reg_z[7] stage1
nbaNodes[1913] = 1; // reg_z[7] stage2
nbaNodes[1119] = 1; // reg_w[0] stage1
nbaNodes[1085] = 1; // reg_w[0] stage2
nbaNodes[1237] = 1; // reg_w[1] stage1
nbaNodes[1203] = 1; // reg_w[1] stage2
nbaNodes[1355] = 1; // reg_w[2] stage1
nbaNodes[1321] = 1; // reg_w[2] stage2
nbaNodes[1471] = 1; // reg_w[3] stage1
nbaNodes[1439] = 1; // reg_w[3] stage2
nbaNodes[1590] = 1; // reg_w[4] stage1
nbaNodes[1556] = 1; // reg_w[4] stage2
nbaNodes[1710] = 1; // reg_w[5] stage1
nbaNodes[1676] = 1; // reg_w[5] stage2
nbaNodes[1829] = 1; // reg_w[6] stage1
nbaNodes[1795] = 1; // reg_w[6] stage2
nbaNodes[1943] = 1; // reg_w[7] stage1
nbaNodes[1912] = 1; // reg_w[7] stage2
nbaNodes[1095] = 1; // reg_spl[0] stage1
nbaNodes[1075] = 1; // reg_spl[0] stage2
nbaNodes[1214] = 1; // reg_spl[1] stage1
nbaNodes[1201] = 1; // reg_spl[1] stage2
nbaNodes[1331] = 1; // reg_spl[2] stage1
nbaNodes[1311] = 1; // reg_spl[2] stage2
nbaNodes[1449] = 1; // reg_spl[3] stage1
nbaNodes[1429] = 1; // reg_spl[3] stage2
nbaNodes[1566] = 1; // reg_spl[4] stage1
nbaNodes[1546] = 1; // reg_spl[4] stage2
nbaNodes[1687] = 1; // reg_spl[5] stage1
nbaNodes[1674] = 1; // reg_spl[5] stage2
nbaNodes[1805] = 1; // reg_spl[6] stage1
nbaNodes[1785] = 1; // reg_spl[6] stage2
nbaNodes[1921] = 1; // reg_spl[7] stage1
nbaNodes[1902] = 1; // reg_spl[7] stage2
nbaNodes[1094] = 1; // reg_sph[0] stage1
nbaNodes[1074] = 1; // reg_sph[0] stage2
nbaNodes[1213] = 1; // reg_sph[1] stage1
nbaNodes[1200] = 1; // reg_sph[1] stage2
nbaNodes[1330] = 1; // reg_sph[2] stage1
nbaNodes[1310] = 1; // reg_sph[2] stage2
nbaNodes[1448] = 1; // reg_sph[3] stage1
nbaNodes[1428] = 1; // reg_sph[3] stage2
nbaNodes[1565] = 1; // reg_sph[4] stage1
nbaNodes[1545] = 1; // reg_sph[4] stage2
nbaNodes[1686] = 1; // reg_sph[5] stage1
nbaNodes[1673] = 1; // reg_sph[5] stage2
nbaNodes[1804] = 1; // reg_sph[6] stage1
nbaNodes[1784] = 1; // reg_sph[6] stage2
nbaNodes[1920] = 1; // reg_sph[7] stage1
nbaNodes[1901] = 1; // reg_sph[7] stage2
nbaNodes[1093] = 1; // reg_pcl[0] stage1
nbaNodes[1073] = 1; // reg_pcl[0] stage2
nbaNodes[1212] = 1; // reg_pcl[1] stage1
nbaNodes[1199] = 1; // reg_pcl[1] stage2
nbaNodes[1329] = 1; // reg_pcl[2] stage1
nbaNodes[1309] = 1; // reg_pcl[2] stage2
nbaNodes[1447] = 1; // reg_pcl[3] stage1
nbaNodes[1427] = 1; // reg_pcl[3] stage2
nbaNodes[1564] = 1; // reg_pcl[4] stage1
nbaNodes[1544] = 1; // reg_pcl[4] stage2
nbaNodes[1685] = 1; // reg_pcl[5] stage1
nbaNodes[1672] = 1; // reg_pcl[5] stage2
nbaNodes[1803] = 1; // reg_pcl[6] stage1
nbaNodes[1783] = 1; // reg_pcl[6] stage2
nbaNodes[1919] = 1; // reg_pcl[7] stage1
nbaNodes[1900] = 1; // reg_pcl[7] stage2
nbaNodes[1092] = 1; // reg_pch[0] stage1
nbaNodes[1072] = 1; // reg_pch[0] stage2
nbaNodes[1211] = 1; // reg_pch[1] stage1
nbaNodes[1198] = 1; // reg_pch[1] stage2
nbaNodes[1328] = 1; // reg_pch[2] stage1
nbaNodes[1308] = 1; // reg_pch[2] stage2
nbaNodes[1446] = 1; // reg_pch[3] stage1
nbaNodes[1426] = 1; // reg_pch[3] stage2
nbaNodes[1563] = 1; // reg_pch[4] stage1
nbaNodes[1543] = 1; // reg_pch[4] stage2
nbaNodes[1684] = 1; // reg_pch[5] stage1
nbaNodes[1671] = 1; // reg_pch[5] stage2
nbaNodes[1802] = 1; // reg_pch[6] stage1
nbaNodes[1782] = 1; // reg_pch[6] stage2
nbaNodes[1918] = 1; // reg_pch[7] stage1
nbaNodes[1899] = 1; // reg_pch[7] stage2
nbaNodes[1100] = 1; // reg_ie[0] stage1
nbaNodes[1084] = 1; // reg_ie[0] stage2
nbaNodes[1216] = 1; // reg_ie[1] stage1
nbaNodes[1202] = 1; // reg_ie[1] stage2
nbaNodes[1336] = 1; // reg_ie[2] stage1
nbaNodes[1320] = 1; // reg_ie[2] stage2
nbaNodes[1454] = 1; // reg_ie[3] stage1
nbaNodes[1438] = 1; // reg_ie[3] stage2
nbaNodes[1571] = 1; // reg_ie[4] stage1
nbaNodes[1555] = 1; // reg_ie[4] stage2
nbaNodes[1689] = 1; // reg_ie[5] stage1
nbaNodes[1675] = 1; // reg_ie[5] stage2
nbaNodes[1810] = 1; // reg_ie[6] stage1
nbaNodes[1794] = 1; // reg_ie[6] stage2
nbaNodes[1926] = 1; // reg_ie[7] stage1
nbaNodes[1911] = 1; // reg_ie[7] stage2
nbaNodes[934] = 1; // flag_h stage1
nbaNodes[945] = 1; // flag_h stage2
nbaNodes[933] = 1; // flag_c stage1
nbaNodes[944] = 1; // flag_c stage2
nbaNodes[935] = 1; // flag_n stage1
nbaNodes[946] = 1; // flag_n stage2
nbaNodes[936] = 1; // flag_z stage1
nbaNodes[947] = 1; // flag_z stage2
nbaNodes[942] = 1; // alu dff? stage1
nbaNodes[943] = 1; // alu dff? stage2
nbaNodes[110] = 1; // xurg stage1
nbaNodes[124] = 1; // xurg stage2
nbaNodes[249] = 1; // xufu stage1
nbaNodes[255] = 1; // xufu stage2
nbaNodes[408] = 1; // xirf stage1
nbaNodes[421] = 1; // xirf stage2
nbaNodes[486] = 1; // xaym stage1
nbaNodes[463] = 1; // xaym stage2
nbaNodes[549] = 1; // xdqf stage1
nbaNodes[564] = 1; // xdqf stage2
nbaNodes[14] = 1; // yoii stage1
nbaNodes[21] = 1; // yoii stage2
nbaNodes[118] = 1; // ysbt stage1
nbaNodes[126] = 1; // ysbt stage2
nbaNodes[516] = 1; // ydxa stage1
nbaNodes[540] = 1; // ydxa stage2
nbaNodes[33] = 1; // zaza stage1
nbaNodes[19] = 1; // zaza stage2
nbaNodes[112] = 1; // zorp stage1
nbaNodes[79] = 1; // zorp stage2
nbaNodes[406] = 1; // zkai stage1
nbaNodes[366] = 1; // zkai stage2
nbaNodes[505] = 1; // zrby stage1
nbaNodes[468] = 1; // zrby stage2
nbaNodes[740] = 1; // zacw stage1
nbaNodes[732] = 1; // zacw stage2
nbaNodes[810] = 1; // zivv stage1
nbaNodes[801] = 1; // zivv stage2
nbaNodes[815] = 1; // zkdu stage1
nbaNodes[821] = 1; // zkdu stage2

// Latches
/*
nbaNodes[576] = 1; // yodp
nbaNodes[1144] = 1; // irq_latch[0]
nbaNodes[1262] = 1; // irq_latch[1]
nbaNodes[1380] = 1; // irq_latch[2]
nbaNodes[1497] = 1; // irq_latch[3]
nbaNodes[1617] = 1; // irq_latch[4]
nbaNodes[1736] = 1; // irq_latch[5]
nbaNodes[1855] = 1; // irq_latch[6]
nbaNodes[1973] = 1; // irq_latch[7]
nbaNodes[365] = 1; // ynkw
nbaNodes[962] = 1; // zjje
nbaNodes[753] = 1; // zkog
nbaNodes[550] = 1; // zloz
nbaNodes[642] = 1; // zojz
nbaNodes[950] = 1; // zrsy
nbaNodes[247] = 1; // zumn
*/
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