mitigate ABA with 32-bit queue indices if possible

[sbarral]

When 64-bit atomics are supported, use 32-bit queue indices. This greatly improves resilience to ABA and has no impact on performance on 64-bit platforms.

Fixes: #5041

Motivation

Currently, a stealer preempted at the wrong moment could attempt to steal more tasks than are available in the queue, resulting in UB. This is due to a potential ABA where the stealer head wraps around due to many push/pop cycles, leading the stealer to wrongly conclude that the state of the queue has not changed.

Solution

The proposed solution is to strongly improve ABA resilience by using 32-bit instead of 16-bit buffer indices when possible.

At the moment, "when possible" is determined based on the availability of 64-bit atomics, as reported by the cfg_has_atomic_u64 macro. Another solution would be to use cfg(target_pointer_width = "64") to exclude 32-bit targets that support 64-bit atomics natively, such as armv7, since these targets may see an impact in performance.

No performance regression was observed on local tests on a x86_64 target using the rt_multi_threaded benchmark.

[Darksonn]

In general this looks fine.

[Darksonn]

Please merge master into your branch to fix the CI issues.

[Darksonn]

Nevermind, I could do it myself.

[Darksonn]

Thanks.

[Darksonn]

You don't need to add any more merge commits at this point.