[WIP] [TMS7000] Tune bus cycles

tgtakaoka · Jun 26, 2024 · e7ff212 · e7ff212
1 parent 5e9496c
commit e7ff212
Showing 1 changed file with 12 additions and 4 deletions.
diff --git a/debugger/tms7000/pins_tms7000.cpp b/debugger/tms7000/pins_tms7000.cpp
@@ -44,10 +44,10 @@ namespace {
 
 constexpr auto clkin_hi_ns = 500;
 constexpr auto clkin_lo_ns = 500;
-constexpr auto clk2_hi_ns = 500;
-constexpr auto clk2_lo_ns = 500;
-constexpr auto clk4_hi_ns = 250;
-constexpr auto clk4_lo_ns = 250;
+constexpr auto clk2_hi_ns = 200;
+constexpr auto clk2_lo_ns = 200;
+constexpr auto clk4_hi_ns = 100;
+constexpr auto clk4_lo_ns = 100;
 
 inline void clkin_hi() {
     digitalWriteFast(PIN_CLKIN, HIGH);
@@ -247,6 +247,7 @@ Signals *PinsTms7000::prepareCycle() const {
         clk_cycle();
     // CLKOUT=L
     clk_hi();
+    assert_debug();
     s->getAddress();
     delayNanoseconds(clk2_hi_ns);
     clk_lo();
@@ -255,6 +256,7 @@ Signals *PinsTms7000::prepareCycle() const {
     clk_hi();
     delayNanoseconds(clk2_hi_ns);
     s->getDirection();
+    negate_debug();
     return s;
 }
 
@@ -269,15 +271,19 @@ Signals *PinsTms7000::completeCycle(Signals *s) const {
         delayNanoseconds(clk2_lo_ns);
         // CLKOUT=L
         clk_hi();
+        assert_debug();
         s->outData();
         delayNanoseconds(clk2_hi_ns);
         clk_lo();
         s->inputMode();
+        negate_debug();
         delayNanoseconds(clk2_lo_ns);
     } else if (s->write()) {  // External write
         clk_lo();
         delayNanoseconds(clk2_lo_ns);
+        assert_debug();
         s->getData();
+        negate_debug();
         // CLKOUT=L
         clk_hi();
         if (s->writeMemory()) {
@@ -294,8 +300,10 @@ Signals *PinsTms7000::completeCycle(Signals *s) const {
         s->getData();
     }
     Signals::nextCycle();
+    assert_debug();
     while (signal_alatch() == LOW)
         clk_cycle();
+    negate_debug();
     return s;
 }