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[WIP] [P8051] Support P8051
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@tgtakaoka
tgtakaoka committed May 11, 2024
1 parent 172e6b9 commit 6bd6df7
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Showing 38 changed files with 12,941 additions and 2,156 deletions.
6 changes: 6 additions & 0 deletions debugger/i8051/compile_flags.txt
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-O
-Wall
-std=c++14
-I..
-I../.pio/libdeps/teensy41/libcli/src
-I../.pio/libdeps/teensy41/libasm/src
58 changes: 58 additions & 0 deletions debugger/i8051/devs_i8051.cpp
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#include "devs_i8051.h"
#include <string.h>
#include "debugger.h"
#include "i8251.h"

namespace debugger {
namespace i8051 {

DevsI8051 Devs;

void DevsI8051::reset() {
USART.reset();
USART.setBaseAddr(USART_BASE);
}

void DevsI8051::begin() {
enableDevice(USART);
}

void DevsI8051::loop() {
USART.loop();
}

bool DevsI8051::isSelected(uint32_t addr) const {
return USART.isSelected(addr);
}

uint16_t DevsI8051::read(uint32_t addr) const {
return USART.read(addr);
}

void DevsI8051::write(uint32_t addr, uint16_t data) const {
USART.write(addr, data);
}

Device &DevsI8051::parseDevice(const char *name) const {
if (strcasecmp(name, USART.name()) == 0)
return USART;
return Devs::nullDevice();
}

void DevsI8051::enableDevice(Device &dev) {
USART.enable(&dev == &USART);
}

void DevsI8051::printDevices() const {
printDevice(USART);
}

} // namespace i8051
} // namespace debugger

// Local Variables:
// mode: c++
// c-basic-offset: 4
// tab-width: 4
// End:
// vim: set ft=cpp et ts=4 sw=4:
35 changes: 35 additions & 0 deletions debugger/i8051/devs_i8051.h
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#ifndef __DEVS_I8051_H__
#define __DEVS_I8051_H__

#include "devs.h"

#define USART_BASE 0xFC

namespace debugger {
namespace i8051 {

struct DevsI8051 final : Devs {
void begin() override;
void reset() override;
void loop() override;
bool isSelected(uint32_t addr) const override;
uint16_t read(uint32_t addr) const override;
void write(uint32_t addr, uint16_t data) const override;

Device &parseDevice(const char *name) const override;
void enableDevice(Device &dev) override;
void printDevices() const override;
};

extern struct DevsI8051 Devs;

} // namespace i8051
} // namespace debugger
#endif /* __DEVS_I8051H__ */

// Local Variables:
// mode: c++
// c-basic-offset: 4
// tab-width: 4
// End:
// vim: set ft=cpp et ts=4 sw=4:
258 changes: 258 additions & 0 deletions debugger/i8051/i8051.txt
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op mnemo operand # ~
-- ----- --------- - -
00 NOP 0 1 2
01 AJMP a11 2 4
02 LJMP a16 3 4
03 RR A 1 2
04 INC A 1 2
05 INC a8 2 2
06 INC @R0 1 2
07 INC @R1 1 2
08 INC R0 1 2
09 INC R1 1 2
0A INC R2 1 2
0B INC R3 1 2
0C INC R4 1 2
0D INC R5 1 2
0E INC R6 1 2
0F INC R7 1 2
10 JBC b8,r8 3 4
11 ACALL a11 2 4
12 LCALL a16 3 4
13 RRC A 1 2
14 DEC A 1 2
15 DEC a8 2 2
16 DEC @R0 1 2
17 DEC @R1 1 2
18 DEC R0 1 2
19 DEC R1 1 2
1A DEC R2 1 2
1B DEC R3 1 2
1C DEC R4 1 2
1D DEC R5 1 2
1E DEC R6 1 2
1F DEC R7 1 2
20 JB b8,r8 3 4
21 AJMP a11 2 4
22 RET - 1 4
23 RL A 1 2
24 ADD A,#n8 2 2
25 ADD A,a8 2 2
26 ADD A,@R0 1 2
27 ADD A,@R1 1 2
28 ADD A,R0 1 2
29 ADD A,R1 1 2
2A ADD A,R2 1 2
2B ADD A,R3 1 2
2C ADD A,R4 1 2
2D ADD A,R5 1 2
2E ADD A,R6 1 2
2F ADD A,R7 1 2
30 JNB b8,r8 3 4
31 ACALL a11 2 4
32 RETI - 1 4
33 RLC A 1 2
34 ADDC A,#n8 2 2
35 ADDC A,a8 2 2
36 ADDC A,@R0 1 2
37 ADDC A,@R1 1 2
38 ADDC A,R0 1 2
39 ADDC A,R1 1 2
3A ADDC A,R2 1 2
3B ADDC A,R3 1 2
3C ADDC A,R4 1 2
3D ADDC A,R5 1 2
3E ADDC A,R6 1 2
3F ADDC A,R7 1 2
40 JC r8 2 4
41 AJMP a11 2 4
42 ORL a8,A 2 2
43 ORL a8,#n8 3 4
44 ORL A,#n8 2 2
45 ORL A,a8 2 2
46 ORL A,@R0 1 2
47 ORL A,@R1 1 2
48 ORL A,R0 1 2
49 ORL A,R1 1 2
4A ORL A,R2 1 2
4B ORL A,R3 1 2
4C ORL A,R4 1 2
4D ORL A,R5 1 2
4E ORL A,R6 1 2
4F ORL A,R7 1 2
50 JNC r8 2 4
51 ACALL a11 2 4
52 ANL a8,A 2 2
53 ANL a8,#n8 3 4
54 ANL A,#n8 2 2
55 ANL A,a8 2 2
56 ANL A,@R0 1 2
57 ANL A,@R1 1 2
58 ANL A,R0 1 2
59 ANL A,R1 1 2
5A ANL A,R2 1 2
5B ANL A,R3 1 2
5C ANL A,R4 1 2
5D ANL A,R5 1 2
5E ANL A,R6 1 2
5F ANL A,R7 1 2
60 JZ r8 2 4
61 AJMP a11 2 4
62 XRL a8,A 2 2
63 XRL a8,#n8 3 4
64 XRL A,#n8 2 2
65 XRL A,a8 2 2
66 XRL A,@R0 1 2
67 XRL A,@R1 1 2
68 XRL A,R0 1 2
69 XRL A,R1 1 2
6A XRL A,R2 1 2
6B XRL A,R3 1 2
6C XRL A,R4 1 2
6D XRL A,R5 1 2
6E XRL A,R6 1 2
6F XRL A,R7 1 2
70 JNZ r8 2 4
71 ACALL a11 2 4
72 ORL C,b8 2 4
73 JMP @A+DPTR 1 4
74 MOV A,#n8 2 2
75 MOV a8,#n8 3 4
76 MOV @R0,#n8 2 2
77 MOV @R1,#n8 2 2
78 MOV R0,#n8 2 2
79 MOV R1,#n8 2 2
7A MOV R2,#n8 2 2
7B MOV R3,#n8 2 2
7C MOV R4,#n8 2 2
7D MOV R5,#n8 2 2
7E MOV R6,#n8 2 2
7F MOV R7,#n8 2 2
80 SJMP r8 2 4
81 AJMP a11 2 4
82 ANL C,b8 2 4
83 MOVC A,@A+PC 1 4
84 DIV AB 1 8
85 MOV a8,a8 3 4
86 MOV a8,@R0 2 4
87 MOV a8,@R1 2 4
88 MOV a8,R0 2 4
89 MOV a8,R1 2 4
8A MOV a8,R2 2 4
8B MOV a8,R3 2 4
8C MOV a8,R4 2 4
8D MOV a8,R5 2 4
8E MOV a8,R6 2 4
8F MOV a8,R7 2 4
90 MOV DPTR,#16 3 4
91 ACALL a11 2 4
92 MOV b8,C 2 4
93 MOVC A,@A+DPTR 1 4
94 SUBB A,#n8 2 2
95 SUBB A,a8 2 2
96 SUBB A,@R0 1 2
97 SUBB A,@R1 1 2
98 SUBB A,R0 1 2
99 SUBB A,R1 1 2
9A SUBB A,R2 1 2
9B SUBB A,R3 1 2
9C SUBB A,R4 1 2
9D SUBB A,R5 1 2
9E SUBB A,R6 1 2
9F SUBB A,R7 1 2
A0 ORL C,/b8 2 4
A1 AJMP a11 2 4
A2 MOV C,b8 2 2
A3 INC DPTR 1 4
A4 MUL AB 1 8
A5 - - -
A6 MOV @R0,a8 2 4
A7 MOV @R1,a8 2 4
A8 MOV R0,a8 2 4
A9 MOV R1,a8 2 4
AA MOV R2,a8 2 4
AB MOV R3,a8 2 4
AC MOV R4,a8 2 4
AD MOV R5,a8 2 4
AE MOV R6,a8 2 4
AF MOV R7,a8 2 4
B0 ANL C,/b8 2 4
B1 ACALL a11 2 4
B2 CPL C,b8 2 2
B3 CPL C 1 2
B4 CJNE A,#n8,r8 3 4
B5 CJNE A,a8,r8 3 4
B6 CJNE @R0,#n8,r8 3 4
B7 CJNE @R1,#n8,r8 3 4
B8 CJNE R0,#n8,r8 3 4
B9 CJNE R1,#n8,r8 3 4
BA CJNE R2,#n8,r8 3 4
BB CJNE R3,#n8,r8 3 4
BC CJNE R4,#n8,r8 3 4
BD CJNE R5,#n8,r8 3 4
BE CJNE R6,#n8,r8 3 4
BF CJNE R7,#n8,r8 3 4
C0 PUSH a8 2 4
C1 AJMP a11 2 4
C2 CLR b8 2 2
C3 CLR C 1 2
C4 SWAP A 1 2
C5 XCH A,a8 2 2
C6 XCH A,@R0 1 2
C7 XCH A,@R1 1 2
C8 XCH A,R0 1 2
C9 XCH A,R1 1 2
CA XCH A,R2 1 2
CB XCH A,R3 1 2
CC XCH A,R4 1 2
CD XCH A,R5 1 2
CE XCH A,R6 1 2
CF XCH A,R7 1 2
D0 POP a8 2 4
D1 ACALL a11 2 4
D2 SETB C,b8 2 2
D3 SETB C 1 2
D4 DA A 1 2
D5 DJNZ a8,r8 3 4
D6 XCHD A,@R0 1 2
D7 XCHD A,@R1 1 2
D8 DJNZ R0,r8 2 4
D9 DJNZ R1,r8 2 4
DA DJNZ R2,r8 2 4
DB DJNZ R3,r8 2 4
DC DJNZ R4,r8 2 4
DD DJNZ R5,r8 2 4
DE DJNZ R6,r8 2 4
DF DJNZ R7,r8 2 4
E0 MOVX A,@DPTR 1 4
E1 AJMP a11 2 4
E2 MOVX A,@R0 1 4
E3 MOVX A,@R1 1 4
E4 CLR A 1 2
E5 MOV A,a8 2 2
E6 MOV A,@R0 1 2
E7 MOV A,@R1 1 2
E8 MOV A,R0 1 2
E9 MOV A,R1 1 2
EA MOV A,R2 1 2
EB MOV A,R3 1 2
EC MOV A,R4 1 2
ED MOV A,R5 1 2
EE MOV A,R6 1 2
EF MOV A,R7 1 2
F0 MOVX @DPTR,A 1 4
F1 ACALL a11 2 4
F2 MOVX @R0,A 1 4
F3 MOVX @R1,A 1 4
F4 CPL A 1 2
F5 MOV a8,A 2 2
F6 XCHD A,@R0 1 2
F7 XCHD A,@R1 1 2
F8 MOV R0,A 1 2
F9 MOV R1,A 1 2
FA MOV R2,A 1 2
FB MOV R3,A 1 2
FC MOV R4,A 1 2
FD MOV R5,A 1 2
FE MOV R6,A 1 2
FF MOV R7,A 1 2
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