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[SCN2650] Read control signals as bus
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Assign control signals, M/#IO, #R/W and INTACK to P9 and read those
signals at once.
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tgtakaoka committed Apr 9, 2024
1 parent c97f352 commit 5257d84
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Showing 18 changed files with 6,823 additions and 1,755 deletions.
38 changes: 17 additions & 21 deletions debugger/scn2650/pins_scn2650.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -89,15 +89,6 @@ void negate_intreq() {
digitalWriteFast(PIN_INTREQ, HIGH);
}

void assert_reset() {
digitalWriteFast(PIN_RESET, HIGH);
negate_intreq();
}

void negate_reset() {
digitalWriteFast(PIN_RESET, LOW);
}

void negate_pause() {
digitalWriteFast(PIN_PAUSE, HIGH);
}
Expand All @@ -110,6 +101,16 @@ void negate_opack() {
digitalWriteFast(PIN_OPACK, HIGH);
}

void assert_reset() {
digitalWriteFast(PIN_RESET, HIGH);
negate_opack();
negate_intreq();
}

void negate_reset() {
digitalWriteFast(PIN_RESET, LOW);
}

const uint8_t PINS_LOW[] = {
PIN_ADREN,
PIN_DBUSEN,
Expand Down Expand Up @@ -248,7 +249,7 @@ Signals *PinsScn2650::completeCycle(Signals *s) {
negate_opack();
clock_lo(); // T2L
delayNanoseconds(clock_lo_input);
busMode(DBUS, INPUT_PULLDOWN);
busMode(DBUS, INPUT);
clock_hi(); // T0H
Signals::nextCycle();
return s;
Expand Down Expand Up @@ -298,14 +299,8 @@ void PinsScn2650::idle() {
void PinsScn2650::loop() {
while (true) {
Devs.loop();
if (!rawStep() || haltSwitch()) {
restoreBreakInsts();
disassembleCycles();
assert_debug();
Regs.save();
negate_debug();
if (!rawStep() || haltSwitch())
return;
}
}
}

Expand All @@ -314,6 +309,9 @@ void PinsScn2650::run() {
Signals::resetCycles();
saveBreakInsts();
loop();
restoreBreakInsts();
disassembleCycles();
Regs.save();
}

bool PinsScn2650::rawStep() {
Expand All @@ -328,11 +326,11 @@ bool PinsScn2650::rawStep() {
completeCycle(s);
const auto opr = Memory.read(s->addr + 1);
const auto busCycles = len + InstScn2650::busCycles(inst, opr);
s->fetchMark() = true;
s->markFetch();
for (auto i = 1; i < busCycles; ++i) {
auto s = prepareCycle();
if (s->vector()) {
s->fetchMark() = false;
s->clearFetch();
completeCycle(s);
if (InstScn2650::busCycles(InstScn2650::ZBSR, s->data)) {
// Indirect vector
Expand All @@ -349,9 +347,7 @@ bool PinsScn2650::rawStep() {
bool PinsScn2650::step(bool show) {
Regs.restore();
Signals::resetCycles();
assert_debug();
if (rawStep()) {
negate_debug();
if (show)
printCycles();
Regs.save();
Expand Down
115 changes: 61 additions & 54 deletions debugger/scn2650/pins_scn2650.h
Original file line number Diff line number Diff line change
@@ -1,60 +1,67 @@
#ifndef __PINS_SCN2650_H__
#define __PINS_SCN2650_H__

#define PORT_DBUS 6 /* GPIO6 */
#define DBUS_gp 16 /* P6.16-P6.23 */
#define DBUS_gm 0xFF /* P6.16-P6.23 */
#define DBUS_vp 0 /* DBUS0-DBUS7 */
#define PIN_DBUS0 19 /* P6.16 */
#define PIN_DBUS1 18 /* P6.17 */
#define PIN_DBUS2 14 /* P6.18 */
#define PIN_DBUS3 15 /* P6.19 */
#define PIN_DBUS4 40 /* P6.20 */
#define PIN_DBUS5 41 /* P6.21 */
#define PIN_DBUS6 17 /* P6.22 */
#define PIN_DBUS7 16 /* P6.23 */
#define PORT_ADRL 6 /* GPIO6 */
#define ADRL_gp 24 /* P6.24-P6.31 */
#define ADRL_gm 0xFF /* P6.24-P6.31 */
#define ADRL_vp 0 /* ADR0-ADR7 */
#define PIN_ADR0 22 /* P6.24 */
#define PIN_ADR1 23 /* P6.25 */
#define PIN_ADR2 20 /* P6.26 */
#define PIN_ADR3 21 /* P6.27 */
#define PIN_ADR4 38 /* P6.28 */
#define PIN_ADR5 39 /* P6.29 */
#define PIN_ADR6 26 /* P6.30 */
#define PIN_ADR7 27 /* P6.31 */
#define PORT_ADRM 7 /* GPIO7 */
#define ADRM_gp 0 /* P7.00-P7.03 */
#define ADRM_gm 0xF /* P7.00-P7.03 */
#define ADRM_vp 8 /* ADR8-ADR11 */
#define PIN_ADR8 10 /* P7.00 */
#define PIN_ADR9 12 /* P7.01 */
#define PIN_ADR10 11 /* P7.02 */
#define PIN_ADR11 13 /* P7.03 */
#define PORT_ADRH 7 /* GPIO7 */
#define ADRH_gp 16 /* P7.16-P7.18 */
#define ADRH_gm 0x7 /* P7.16-P7.18 */
#define ADRH_vp 12 /* ADR12-ADR14 */
#define PIN_ADR12 8 /* P7.16 */
#define PIN_ADR13 7 /* P7.17 */
#define PIN_ADR14 36 /* P7.18 */
#define PIN_MIO 37 /* P6.19 */
#define PIN_PAUSE 2 /* P9.04 */
#define PIN_RW 3 /* P9.05 */
#define PIN_INTREQ 4 /* P9.06 */
#define PIN_INTACK 33 /* P9.07 */
#define PIN_FLAG 0 /* P6.03 */
#define PIN_SENSE 1 /* P6.04 */
#define PIN_CLOCK 5 /* P9.08 */
#define PIN_RUNWAIT 29 /* P9.31 */
#define PIN_OPREQ 6 /* P7.10 */
#define PIN_WRP 9 /* P7.11 */
#define PIN_DBUSEN 32 /* P7.12 */
#define PIN_RESET 28 /* P8.18 */
#define PIN_ADREN 31 /* P8.22 */
#define PIN_OPACK 30 /* P8.23 */
#define PORT_DBUS 6 /* GPIO6 */
#define DBUS_gp 16 /* P6.16-P6.23 */
#define DBUS_gm 0xFF /* P6.16-P6.23 */
#define DBUS_vp 0 /* DBUS0-DBUS7 */
#define PIN_DBUS0 19 /* P6.16 */
#define PIN_DBUS1 18 /* P6.17 */
#define PIN_DBUS2 14 /* P6.18 */
#define PIN_DBUS3 15 /* P6.19 */
#define PIN_DBUS4 40 /* P6.20 */
#define PIN_DBUS5 41 /* P6.21 */
#define PIN_DBUS6 17 /* P6.22 */
#define PIN_DBUS7 16 /* P6.23 */
#define PORT_ADRL 6 /* GPIO6 */
#define ADRL_gp 24 /* P6.24-P6.31 */
#define ADRL_gm 0xFF /* P6.24-P6.31 */
#define ADRL_vp 0 /* ADR0-ADR7 */
#define PIN_ADR0 22 /* P6.24 */
#define PIN_ADR1 23 /* P6.25 */
#define PIN_ADR2 20 /* P6.26 */
#define PIN_ADR3 21 /* P6.27 */
#define PIN_ADR4 38 /* P6.28 */
#define PIN_ADR5 39 /* P6.29 */
#define PIN_ADR6 26 /* P6.30 */
#define PIN_ADR7 27 /* P6.31 */
#define PORT_ADRM 7 /* GPIO7 */
#define ADRM_gp 0 /* P7.00-P7.03 */
#define ADRM_gm 0xF /* P7.00-P7.03 */
#define ADRM_vp 8 /* ADR8-ADR11 */
#define PIN_ADR8 10 /* P7.00 */
#define PIN_ADR9 12 /* P7.01 */
#define PIN_ADR10 11 /* P7.02 */
#define PIN_ADR11 13 /* P7.03 */
#define PORT_ADRH 7 /* GPIO7 */
#define ADRH_gp 16 /* P7.16-P7.18 */
#define ADRH_gm 0x7 /* P7.16-P7.18 */
#define ADRH_vp 12 /* ADR12-ADR14 */
#define PIN_ADR12 8 /* P7.16 */
#define PIN_ADR13 7 /* P7.17 */
#define PIN_ADR14 36 /* P7.18 */
#define PIN_PAUSE 37 /* P6.19 */
#define PORT_CNTL 9 /* GPIO9 */
#define CNTL_gp 4 /* P9.04~P9.07 */
#define CNTL_gm 0xF /* P9.04~P9.07 */
#define CNTL_vp 4 /* CNTL4~CNTL7 */
#define PIN_MIO 2 /* P9.04 */
#define PIN_RW 3 /* P9.05 */
#define PIN_INTREQ 4 /* P9.06 */
#define PIN_INTACK 33 /* P9.07 */
#define CNTL_MIO 0x10 /* CNTL4 */
#define CNTL_RW 0x20 /* CNTL5 */
#define CNTL_INTACK 0x80 /* CNTL7 */
#define PIN_FLAG 0 /* P6.03 */
#define PIN_SENSE 1 /* P6.04 */
#define PIN_CLOCK 5 /* P9.08 */
#define PIN_RUNWAIT 29 /* P9.31 */
#define PIN_OPREQ 6 /* P7.10 */
#define PIN_WRP 9 /* P7.11 */
#define PIN_DBUSEN 32 /* P7.12 */
#define PIN_RESET 28 /* P8.18 */
#define PIN_ADREN 31 /* P8.22 */
#define PIN_OPACK 30 /* P8.23 */

#include "pins.h"
#include "signals_scn2650.h"
Expand Down
23 changes: 18 additions & 5 deletions debugger/scn2650/signals_scn2650.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -9,10 +9,23 @@ namespace scn2650 {

void Signals::getAddr() {
addr = busRead(ADRL) | busRead(ADRM) | busRead(ADRH);
rw() = digitalReadFast(PIN_RW);
mio() = digitalReadFast(PIN_MIO);
intack() = digitalReadFast(PIN_INTACK);
fetchMark() = false;
cntl() = busRead(CNTL);
}

bool Signals::read() const {
return (cntl() & CNTL_RW) == 0;
}

bool Signals::write() const {
return (cntl() & CNTL_RW) != 0;
}

bool Signals::io() const {
return (cntl() & CNTL_MIO) == 0;
}

bool Signals::vector() const {
return (cntl() & CNTL_INTACK) != 0;
}

void Signals::getData() {
Expand All @@ -28,7 +41,7 @@ void Signals::print() const {
// 01234567890123
static constexpr char line[] = "MR A=xxxx D=xx";
static auto &buffer = *new CharBuffer(line);
buffer[0] = io() ? (intack() ? 'V' : 'I') : 'M';
buffer[0] = io() ? (vector() ? 'V' : 'I') : 'M';
buffer[1] = write() ? 'W' : 'R';
if (io()) {
if (addr & 0x2000) {
Expand Down
22 changes: 10 additions & 12 deletions debugger/scn2650/signals_scn2650.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,21 +12,19 @@ struct Signals final : SignalsBase<Signals> {
void outData();
void print() const;

bool read() const { return rw() == 0; }
bool write() const { return rw() != 0; }
bool io() const { return mio() == 0; }
bool vector() const { return intack() != 0; }
bool fetch() const { return _signals[3]; }
uint8_t &fetchMark() { return _signals[3]; }
bool read() const;
bool write() const;
bool io() const;
bool vector() const;
bool fetch() const { return (cntl() & CNTL_FETCH) != 0; }
void markFetch() { cntl() |= CNTL_FETCH; }
void clearFetch() { cntl() &= ~CNTL_FETCH; }

private:
uint8_t rw() const { return _signals[0]; }
uint8_t mio() const { return _signals[1]; }
uint8_t intack() const { return _signals[2]; }
static constexpr uint8_t CNTL_FETCH = 0x01;

uint8_t &rw() { return _signals[0]; }
uint8_t &mio() { return _signals[1]; }
uint8_t &intack() { return _signals[2]; }
uint8_t cntl() const { return _signals[0]; }
uint8_t &cntl() { return _signals[0]; }
};

} // namespace scn2650
Expand Down
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