[sw] rework intrinsic libraries #448
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fix instruction type name; e.g. r3 type = 3 registers (2 source registers, 1 destination register)
add compatibility layer
stnolting
added
the
risc-v compliance
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This PR is a rework of the core's intrinsic / custom instruction library.
neorv32_cfu_r3_instr(funct7, funct3, rs1, rs2)´is now the primitive for custom instructions (CFU); a compatibility layer is provided to further support the CFU'sneorv32_cfu_cmd0(funct7, rs1, rs2)...neorv32_cfu_cmd7(funct7, rs1, rs2)intrinsics