simulating hello_world

[Sam-Vervaeck]

Hey, I have two smaller questions for this thread about the uart. I am simulating the hello_world example in Vivado xsim with the faster uart output (section 13.2 of the user guide) using "make USER_FLAGS+=-DUART0_SIM_MODE clean_all install" and manually having the simulator run for 1 ms. This way I can see the hello world being printed in the tcl console.

Question 1: I was going through the main.c code of the hello_world file and saw the "neorv32_uart0_setup(BAUD_RATE, 0)" function call. However, when looking through neorv32_uart.h I don't find that function defined? Only the more general neorv32_uart_setup() seems to be defined but requires a uart pointer argument? Where is the more specific neorv32_uart0_setup) defined?

Question 2: I wanted to see the "hello world!" data that is printed in the tcl console move through the uart in the simulator. I don't seem to find the variable however to put on my waveform that shows the data going through. What variable(s) should I have logged to see it moving through with time?

[stnolting]

Hey @Sam-Vervaeck.

Question 1: I was going through the main.c code of the hello_world file and saw the "neorv32_uart0_setup(BAUD_RATE, 0)" function call. However, when looking through neorv32_uart.h I don't find that function defined? Only the more general neorv32_uart_setup() seems to be defined but requires a uart pointer argument? Where is the more specific neorv32_uart0_setup) defined?

These are wrappers for the two UARTs that use the same "core" functions. The pointer you are mentioning is the actual "hardware handle" (a pointer to the according UART's memory-mapped interface register struct).

They are define in neorv32_legacy.h:

neorv32/sw/lib/include/neorv32_legacy.h

Lines 22 to 68 in 00d248c

	/**********************************************************************//**
	* @name UART0 legacy compatibility wrappers
	**************************************************************************/
	/**@{*/
	#define neorv32_uart0_available() neorv32_uart_available(NEORV32_UART0)
	#define neorv32_uart0_get_rx_fifo_depth() neorv32_uart_get_rx_fifo_depth(NEORV32_UART0)
	#define neorv32_uart0_get_tx_fifo_depth() neorv32_uart_get_tx_fifo_depth(NEORV32_UART0)
	#define neorv32_uart0_setup(baudrate, irq_mask) neorv32_uart_setup(NEORV32_UART0, baudrate, irq_mask)
	#define neorv32_uart0_disable() neorv32_uart_disable(NEORV32_UART0)
	#define neorv32_uart0_enable() neorv32_uart_enable(NEORV32_UART0)
	#define neorv32_uart0_rtscts_disable() neorv32_uart_rtscts_disable(NEORV32_UART0)
	#define neorv32_uart0_rtscts_enable() neorv32_uart_rtscts_enable(NEORV32_UART0)
	#define neorv32_uart0_putc(c) neorv32_uart_putc(NEORV32_UART0, c)
	#define neorv32_uart0_rx_clear() neorv32_uart_rx_clear(NEORV32_UART0)
	#define neorv32_uart0_tx_clear() neorv32_uart_tx_clear(NEORV32_UART0)
	#define neorv32_uart0_tx_busy() neorv32_uart_tx_busy(NEORV32_UART0)
	#define neorv32_uart0_getc() neorv32_uart_getc(NEORV32_UART0)
	#define neorv32_uart0_char_received() neorv32_uart_char_received(NEORV32_UART0)
	#define neorv32_uart0_char_received_get() neorv32_uart_char_received_get(NEORV32_UART0)
	#define neorv32_uart0_puts(s) neorv32_uart_puts(NEORV32_UART0, s)
	#define neorv32_uart0_printf(...) neorv32_uart_printf(NEORV32_UART0, __VA_ARGS__)
	#define neorv32_uart0_scan(buffer, max_size, echo) neorv32_uart_scan(NEORV32_UART0, buffer, max_size, echo)
	/**@}*/
	/**********************************************************************//**
	* @name UART1 legacy compatibility wrappers
	**************************************************************************/
	/**@{*/
	#define neorv32_uart1_available() neorv32_uart_available(NEORV32_UART1)
	#define neorv32_uart1_get_rx_fifo_depth() neorv32_uart_get_rx_fifo_depth(NEORV32_UART1)
	#define neorv32_uart1_get_tx_fifo_depth() neorv32_uart_get_tx_fifo_depth(NEORV32_UART1)
	#define neorv32_uart1_setup(baudrate, irq_mask) neorv32_uart_setup(NEORV32_UART1, baudrate, irq_mask)
	#define neorv32_uart1_disable() neorv32_uart_disable(NEORV32_UART1)
	#define neorv32_uart1_enable() neorv32_uart_enable(NEORV32_UART1)
	#define neorv32_uart1_rtscts_disable() neorv32_uart_rtscts_disable(NEORV32_UART1)
	#define neorv32_uart1_rtscts_enable() neorv32_uart_rtscts_enable(NEORV32_UART1)
	#define neorv32_uart1_putc(c) neorv32_uart_putc(NEORV32_UART1, c)
	#define neorv32_uart1_rx_clear() neorv32_uart_rx_clear(NEORV32_UART1)
	#define neorv32_uart1_tx_clear() neorv32_uart_tx_clear(NEORV32_UART1)
	#define neorv32_uart1_tx_busy() neorv32_uart_tx_busy(NEORV32_UART1)
	#define neorv32_uart1_getc() neorv32_uart_getc(NEORV32_UART1)
	#define neorv32_uart1_char_received() neorv32_uart_char_received(NEORV32_UART1)
	#define neorv32_uart1_char_received_get() neorv32_uart_char_received_get(NEORV32_UART1)
	#define neorv32_uart1_puts(s) neorv32_uart_puts(NEORV32_UART1, s)
	#define neorv32_uart1_printf(...) neorv32_uart_printf(NEORV32_UART1, __VA_ARGS__)
	#define neorv32_uart1_scan(buffer, max_size, echo) neorv32_uart_scan(NEORV32_UART1, buffer, max_size, echo)
	/**@}*/

But I no longer see them as legacy artifacts, so maybe those defines should be move (back) the neorv32_uart.h. 🤔

Question 2: I wanted to see the "hello world!" data that is printed in the tcl console move through the uart in the simulator. I don't seem to find the variable however to put on my waveform that shows the data going through. What variable(s) should I have logged to see it moving through with time?

What kind of "data" do you want to track in your waveform?

Note that when "simulation mode" is enabled there is no "physical" UART transmission at all; i.e. you won't see the UART TX signal toggling.

If you want to see the data being send to the UART module you could track the UART's bus request port and check for write accesses to the DATA register:

neorv32/rtl/core/neorv32_uart.vhd

Line 33 in 00d248c

bus_req_i : in bus_req_t; -- bus request

Here is the type definition of the request bus:

neorv32/rtl/core/neorv32_package.vhd

Lines 124 to 135 in 00d248c

	-- bus request --
	type bus_req_t is record
	addr : std_ulogic_vector(31 downto 0); -- access address
	data : std_ulogic_vector(31 downto 0); -- write data
	ben : std_ulogic_vector(3 downto 0); -- byte enable
	stb : std_ulogic; -- request strobe, single-shot
	rw : std_ulogic; -- 0=read, 1=write
	src : std_ulogic; -- access source (1=instruction fetch, 0=data access)
	priv : std_ulogic; -- set if privileged (machine-mode) access
	rvso : std_ulogic; -- set if reservation set operation (atomic LR/SC)
	fence : std_ulogic; -- set if fence(.i) operation, single-shot, independent of STB
	end record;

And here is the documentation of the bus protocol: https://stnolting.github.io/neorv32/#_bus_interface_protocol

[Sam-Vervaeck]

I managed to see the characters being printed by creating a virtual bus in Vivado simulator containing the 8 LSBs of the data property of the bus_req_i port! Thanks for the information :).

One more question though:
In neorv32_tb_simple.vhd the file_uart0_tx_out is defined as "neorv32.testbench_uart0.out". Is this file even used when you are using the actual uart on a FPGA board? Because when i ctrl+f through the test bench the variable is used nowhere else.
In neorv32_top.vhd and neorv32_test_setup_approm.vhd the variable is also not used.
In neorv32_top.vhd a different file name is however hardcoded into the SIM_LOG_FILE property of both the UARTs and it has as name "neorv32.uart[0/1].sim_mode.text.out" for UART[0/1]. This file's contents i do see updating in my sim folder when I run a simulation with different print outputs.

[stnolting]

I managed to see the characters being printed by creating a virtual bus in Vivado simulator containing the 8 LSBs of the data property of the bus_req_i port! Thanks for the information :).

👍

In neorv32_tb_simple.vhd the file_uart0_tx_out is defined as "neorv32.testbench_uart0.out". Is this file even used when you are using the actual uart on a FPGA board?

This part of the HDL code (testbench-related) is evaluated only by the simulator. If you synthesize this part into “real hardware”, there is no simulator and therefore no textio files.