Merge pull request #99 from umarcor/osflow-rework

osflow rework

Author: stnolting

.github/workflows/Windows.yml

@@ -29,27 +29,24 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        platform: [
-          {icon: '⬛', installs: 'MINGW32', arch: i686,   pkg: 'mcode' },
-          {icon: '🟦', installs: 'MINGW64', arch: x86_64, pkg: 'llvm'  },
-        ]
-        example: ${{ fromJson(needs.Matrix.outputs.matrix) }}
-    name: '${{ matrix.platform.icon }} ${{ matrix.platform.installs }} | ${{ matrix.example.board }} · ${{ matrix.example.design }}'
+        include: ${{ fromJson(needs.Matrix.outputs.matrix) }}
+    name: '🟦 MINGW64 | ${{ matrix.board }} · ${{ matrix.design }}'
     defaults:
       run:
         shell: msys2 {0}
     steps:
 
-    - name: '${{ matrix.platform.icon }} Setup MSYS2'
+    - name: '🟦 Setup MSYS2'
       uses: msys2/setup-msys2@v2
       with:
-        msystem: ${{ matrix.platform.installs }}
+        msystem: MINGW64
         update: true
         install: >
           make
-          mingw-w64-${{ matrix.platform.arch }}-yosys
-          mingw-w64-${{ matrix.platform.arch }}-nextpnr
-          mingw-w64-${{ matrix.platform.arch }}-icestorm
+          mingw-w64-x86_64-yosys
+          mingw-w64-x86_64-nextpnr
+          mingw-w64-x86_64-icestorm
+          mingw-w64-x86_64-prjtrellis
 
     - name: '⚙️ git config'
       run: git config --global core.autocrlf input
@@ -61,8 +58,8 @@ jobs:
         # The command 'git describe' (used for version) needs the history.
         fetch-depth: 0
 
-    - name: '🚧 Generate ${{ matrix.example.board }} ${{ matrix.example.design }} bitstream'
-      run: make -C setups/examples BOARD=${{ matrix.example.board }} ${{ matrix.example.design }}
+    - name: '🚧 Generate ${{ matrix.board }} ${{ matrix.design }} bitstream'
+      run: make -C setups/examples BOARD=${{ matrix.board }} ${{ matrix.design }}
 
 
   Processor:

setups/examples/Makefile

@@ -1,6 +1,6 @@
 OSFLOW := ../osflow
-EXAMPLES := ../../examples
-TEMPLATES := ../../../rtl/templates
+EXAMPLES := ../examples
+TEMPLATES := ../../rtl/templates
 MV := mv
 
 TASK := clean $(BITSTREAM)
@@ -13,22 +13,24 @@ endif
 
 run:
 	$(eval TASK ?= clean $(BITSTREAM))
-	$(MAKE) -C $(OSFLOW)/$(BOARD)/ \
+	$(MAKE) -C $(OSFLOW) -f common.mk \
 	  BOARD_SRC=$(EXAMPLES)/neorv32_$(BOARD)_BoardTop_$(DESIGN).vhd \
 	  TOP=neorv32_$(BOARD)_BoardTop_$(DESIGN) \
 	  ID=$(DESIGN) \
-	  $(TASK)
-	$(MV) $(OSFLOW)/$(BOARD)/$(BITSTREAM) ./
+	  $(TASK) \
+	&& $(MV) $(OSFLOW)/$(BITSTREAM) ./
+
+# Boards
 
 Fomu:
 ifeq ($(DESIGN),Minimal)
-	$(eval IMEM_SRC := ../../../rtl/core/neorv32_imem.vhd)
+	$(eval IMEM_SRC := ../../rtl/core/neorv32_imem.vhd)
 else
-	$(eval IMEM_SRC := ../devices/ice40/neorv32_imem.ice40up_spram.vhd)
+	$(eval IMEM_SRC := devices/ice40/neorv32_imem.ice40up_spram.vhd)
 endif
 	$(MAKE) \
 	  BITSTREAM=neorv32_$(BOARD)_$(FOMU_REV)_$(DESIGN).bit \
-	  NEORV32_MEM_SRC="${IMEM_SRC} ../devices/ice40/neorv32_dmem.ice40up_spram.vhd" \
+	  NEORV32_MEM_SRC="${IMEM_SRC} devices/ice40/neorv32_dmem.ice40up_spram.vhd" \
 	  run
 
 iCESugar:
@@ -41,6 +43,8 @@ UPduino_v3:
 	  BITSTREAM=neorv32_$(BOARD)_$(DESIGN).bit \
 	  run
 
+# Designs
+
 Minimal:
 	$(MAKE) \
 	  DESIGN=$@ \
@@ -63,5 +67,5 @@ MixedLanguage:
 	$(MAKE) \
 	  DESIGN=$@ \
 	  DESIGN_SRC=$(TEMPLATES)/processor/neorv32_ProcessorTop_Minimal*.vhd \
-	  NEORV32_VERILOG_SRC='../devices/ice40/sb_ice40_components.v ../../examples/neorv32_Fomu_MixedLanguage_ClkGen.v' \
+	  NEORV32_VERILOG_SRC='devices/ice40/sb_ice40_components.v ../examples/neorv32_Fomu_MixedLanguage_ClkGen.v' \
 	  $(BOARD)

setups/osflow/.gitignore

@@ -0,0 +1,6 @@
+*.asc
+*.bit
+*.dfu
+*.history
+*.json
+*-report.txt

setups/osflow/Fomu/.gitignore

@@ -1,9 +1,9 @@
-${IMPL}.asc: $(IMPL).json $(PCF)
+${IMPL}.${PNR2BIT_EXT}: $(IMPL).json $(CONSTRAINTS)
 	$(NEXTPNR) \
 	  $(PNRFLAGS) \
-	  --pcf $(PCF) \
+	  --$(CONSTRAINTS_FORMAT) $(CONSTRAINTS) \
 	  --json $(IMPL).json \
-	  --asc $@ 2>&1 | tee nextpnr-report.txt
+	  --${NEXTPNR_OUT} $@ 2>&1 | tee nextpnr-report.txt
 
-${IMPL}.bit: $(IMPL).asc
-	$(ICEPACK) $< $@
+${IMPL}.bit: ${IMPL}.${PNR2BIT_EXT}
+	$(PACKTOOL) $< $@

setups/osflow/Fomu/Makefile

@@ -0,0 +1,16 @@
+.PHONY: all
+
+# Default target: run all required targets to build the DFU image.
+all: $(IMPL).dfu
+	echo "! Built $(IMPL) for $(BOARD) $(FOMU_REV)"
+
+# Use dfu-suffix to generate the DFU image from the FPGA bitstream.
+${IMPL}.dfu: $(IMPL).bit
+	$(COPY) $< $@
+	dfu-suffix -v 1209 -p 70b1 -a $@
+
+# Use df-util to load the DFU image onto the Fomu.
+load: $(IMPL).dfu
+	dfu-util -D $<
+
+.PHONY: load

setups/osflow/Fomu/board.mk

@@ -0,0 +1,4 @@
+.PHONY: all
+
+all: bit
+	echo "! Built $(IMPL) for $(BOARD)"

setups/osflow/PnR_Bit.mk

@@ -0,0 +1,4 @@
+.PHONY: all
+
+all: bit
+	echo "! Built $(IMPL) for $(BOARD)"

setups/osflow/UPduino_v3/.gitignore

@@ -0,0 +1,60 @@
+PCF_PATH ?= constraints
+
+
+ifeq ($(BOARD),Fomu)
+
+$(info Setting constraints and implementation args for BOARD Fomu)
+
+# Different Fomu hardware revisions are wired differently and thus
+# require different configurations for yosys and nextpnr.
+# Configuration is performed by setting the environment variable FOMU_REV accordingly.
+
+FOMU_REV ?= pvt
+
+ifeq ($(FOMU_REV),evt1)
+YOSYSFLAGS  ?= -D EVT=1 -D EVT1=1 -D HAVE_PMOD=1
+PNRFLAGS    ?= --up5k --package sg48
+CONSTRAINTS ?= $(PCF_PATH)/fomu-evt2.pcf
+else ifeq ($(FOMU_REV),evt2)
+YOSYSFLAGS  ?= -D EVT=1 -D EVT2=1 -D HAVE_PMOD=1
+PNRFLAGS    ?= --up5k --package sg48
+CONSTRAINTS ?= $(PCF_PATH)/fomu-evt2.pcf
+else ifeq ($(FOMU_REV),evt3)
+YOSYSFLAGS  ?= -D EVT=1 -D EVT3=1 -D HAVE_PMOD=1
+PNRFLAGS    ?= --up5k --package sg48
+CONSTRAINTS ?= $(PCF_PATH)/fomu-evt3.pcf
+else ifeq ($(FOMU_REV),hacker)
+YOSYSFLAGS  ?= -D HACKER=1
+PNRFLAGS    ?= --up5k --package uwg30
+CONSTRAINTS ?= $(PCF_PATH)/fomu-hacker.pcf
+else ifeq ($(FOMU_REV),pvt)
+YOSYSFLAGS  ?= -D PVT=1
+PNRFLAGS    ?= --up5k --package uwg30
+CONSTRAINTS ?= $(PCF_PATH)/fomu-pvt.pcf
+else
+$(error Unrecognized FOMU_REV value. must be "evt1", "evt2", "evt3", "pvt", or "hacker")
+endif
+
+IMPL := neorv32_Fomu_$(FOMU_REV)_$(ID)
+
+endif
+
+
+ifeq ($(BOARD),iCESugar)
+$(info Setting constraints and implementation args for BOARD iCESugar)
+
+CONSTRAINTS ?= $(PCF_PATH)/iCESugar.pcf
+PNRFLAGS    ?= --up5k --package sg48 --ignore-loops --timing-allow-fail
+IMPL        ?= neorv32_iCESugar_$(ID)
+
+endif
+
+
+ifeq ($(BOARD),UPduino_v3)
+$(info Setting constraints and implementation args for BOARD UPduino)
+
+CONSTRAINTS ?= $(PCF_PATH)/UPduino_v3.pcf
+PNRFLAGS    ?= --up5k --package sg48 --ignore-loops --timing-allow-fail
+IMPL        ?= neorv32_UPduino_v3_$(ID)
+
+endif

setups/osflow/UPduino_v3/Makefile

@@ -0,0 +1,35 @@
+ID ?= impl_1
+
+include boards/index.mk
+
+ifndef TOP
+$(error TOP needs to be specified!)
+endif
+
+include filesets.mk
+
+ifndef DESIGN_SRC
+ifndef BOARD_SRC
+$(error Neither DESIGN_SRC nor BOARD_SRC were set!)
+endif
+endif
+
+include tools.mk
+
+ifdef GHDL_PLUGIN_MODULE
+YOSYSFLAGS += -m $(GHDL_PLUGIN_MODULE)
+endif
+
+include synthesis.mk
+include PnR_Bit.mk
+
+.PHONY: syn impl bit clean
+
+syn: ${IMPL}.json
+impl: ${IMPL}.${PNR2BIT_EXT}
+bit: ${IMPL}.bit
+
+clean:
+	rm -rf *.{${PNR2BIT_EXT},bit,cf,dfu,history,json,o} *-report.txt
+
+include boards/$(BOARD).mk