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Fix computation of timer frequency #434

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merged 1 commit into from
Aug 26, 2022
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SnVIZQ
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@SnVIZQ SnVIZQ commented Aug 25, 2022

Retrieving timer frequency using PwmHz::get_period() function can cause
division by zero exception for certain types of frequencies which are
configured by having zero in any of the PSC or ARR register - current
implementation uses "clk / (psc * arr)" expression to compute the
frequency.

Implementation of compute_arr_presc() sets PSC and ARR registers
correctly. Performing inverse computation leads to different expression:
"clk / ((psc + 1) * (arr + 1))" which properly computes timer frequency
from PSC and ARR registers. This patch uses new/fixed expression for
computing timer frequency.

Change log was modified.

Retrieving timer frequency using PwmHz::get_period() function can cause
division by zero exception for certain types of frequencies which are
configured by having zero in any of the PSC or ARR register - current
implementation uses "clk / (psc * arr)" expression to compute the
frequency.

Implementation of compute_arr_presc() sets PSC and ARR registers
correctly. Performing inverse computation leads to different expression:
"clk / ((psc + 1) * (arr + 1))" which properly computes timer frequency
from PSC and ARR registers. This patch uses new/fixed expression for
computing timer frequency.
@burrbull
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bors r+

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bors bot commented Aug 26, 2022

@bors bors bot merged commit 8f3f3be into stm32-rs:master Aug 26, 2022
bors bot added a commit to stm32-rs/stm32f4xx-hal that referenced this pull request Aug 26, 2022
518: fix PwmHz::get_period r=therealprof a=burrbull

See stm32-rs/stm32f1xx-hal#434

Co-authored-by: Andrey Zgarbul <[email protected]>
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2 participants