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Add BlockingReadDma/BlockingWriteDma traits #278

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Add BlockingReadDma/BlockingWriteDma traits #278

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db0c6ee
TransferR/W
burrbull Oct 15, 2020
cdafe92
DMA blocking read/write
burrbull Oct 17, 2020
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42 changes: 31 additions & 11 deletions src/adc.rs
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
use core::marker::PhantomData;
use embedded_hal::adc::{Channel, OneShot};

use crate::dma::{dma1::C1, CircBuffer, Receive, RxDma, Transfer, TransferPayload, W};
use crate::dma::{dma1::C1, CircBuffer, Receive, RxDma, TransferPayload, TransferW};
use crate::gpio::Analog;
use crate::gpio::{gpioa, gpiob, gpioc};
use crate::rcc::{Clocks, Enable, Reset, APB2};
Expand Down Expand Up @@ -737,14 +737,12 @@ where
}
}

impl<B, PINS, MODE> crate::dma::ReadDma<B, u16> for AdcDma<PINS, MODE>
where
Self: TransferPayload,
B: StaticWriteBuffer<Word = u16>,
{
fn read(mut self, mut buffer: B) -> Transfer<W, B, Self> {
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
// until the end of the transfer.
impl<PINS, MODE> AdcDma<PINS, MODE> {
#[inline(always)]
fn configure_read<B>(&mut self, buffer: &mut B)
where
B: StaticWriteBuffer<Word = u16>,
{
let (ptr, len) = unsafe { buffer.static_write_buffer() };
self.channel
.set_peripheral_address(unsafe { &(*ADC1::ptr()).dr as *const _ as u32 }, false);
Expand All @@ -766,8 +764,30 @@ where
.dir()
.clear_bit()
});
self.start();
}
}

Transfer::w(buffer, self)
impl<B, PINS, MODE> crate::dma::ReadDma<B, u16> for AdcDma<PINS, MODE>
where
Self: TransferPayload,
B: StaticWriteBuffer<Word = u16>,
{
fn read(mut self, mut buffer: B) -> TransferW<B, Self> {
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
// until the end of the transfer.
self.configure_read(&mut buffer);
self.start();
TransferW::new(buffer, self)
}
}
impl<B, PINS, MODE> crate::dma::BlockingReadDma<B, u16> for AdcDma<PINS, MODE>
where
Self: TransferPayload,
B: StaticWriteBuffer<Word = u16>,
{
fn blocking_read(&mut self, buffer: &mut B) {
self.configure_read(buffer);
self.start();
self.channel.wait_transfer();
}
}
128 changes: 69 additions & 59 deletions src/dma.rs
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,10 +1,7 @@
//! # Direct Memory Access
#![allow(dead_code)]

use core::{
marker::PhantomData,
sync::atomic::{compiler_fence, Ordering},
};
use core::sync::atomic::{compiler_fence, Ordering};
use embedded_dma::{StaticReadBuffer, StaticWriteBuffer};

use crate::rcc::AHB;
Expand Down Expand Up @@ -59,43 +56,42 @@ pub trait TransferPayload {
fn start(&mut self);
fn stop(&mut self);
}

pub struct Transfer<MODE, BUFFER, PAYLOAD>
/// Read transfer
pub struct TransferR<BUFFER, PAYLOAD>
where
PAYLOAD: TransferPayload,
{
buffer: BUFFER,
payload: PAYLOAD,
}
/// Write transfer
pub struct TransferW<BUFFER, PAYLOAD>
where
PAYLOAD: TransferPayload,
{
_mode: PhantomData<MODE>,
buffer: BUFFER,
payload: PAYLOAD,
}

impl<BUFFER, PAYLOAD> Transfer<R, BUFFER, PAYLOAD>
impl<BUFFER, PAYLOAD> TransferR<BUFFER, PAYLOAD>
where
PAYLOAD: TransferPayload,
{
pub(crate) fn r(buffer: BUFFER, payload: PAYLOAD) -> Self {
Transfer {
_mode: PhantomData,
buffer,
payload,
}
pub(crate) fn new(buffer: BUFFER, payload: PAYLOAD) -> Self {
Self { buffer, payload }
}
}

impl<BUFFER, PAYLOAD> Transfer<W, BUFFER, PAYLOAD>
impl<BUFFER, PAYLOAD> TransferW<BUFFER, PAYLOAD>
where
PAYLOAD: TransferPayload,
{
pub(crate) fn w(buffer: BUFFER, payload: PAYLOAD) -> Self {
Transfer {
_mode: PhantomData,
buffer,
payload,
}
pub(crate) fn new(buffer: BUFFER, payload: PAYLOAD) -> Self {
Self { buffer, payload }
}
}

impl<MODE, BUFFER, PAYLOAD> Drop for Transfer<MODE, BUFFER, PAYLOAD>
impl<BUFFER, PAYLOAD> Drop for TransferR<BUFFER, PAYLOAD>
where
PAYLOAD: TransferPayload,
{
Expand All @@ -105,11 +101,15 @@ where
}
}

/// Read transfer
pub struct R;

/// Write transfer
pub struct W;
impl<BUFFER, PAYLOAD> Drop for TransferW<BUFFER, PAYLOAD>
where
PAYLOAD: TransferPayload,
{
fn drop(&mut self) {
self.payload.stop();
compiler_fence(Ordering::SeqCst);
}
}

macro_rules! dma {
($($DMAX:ident: ($dmaX:ident, {
Expand All @@ -128,7 +128,7 @@ macro_rules! dma {

use crate::pac::{$DMAX, dma1};

use crate::dma::{CircBuffer, DmaExt, Error, Event, Half, Transfer, W, RxDma, TxDma, TransferPayload};
use crate::dma::{CircBuffer, DmaExt, Error, Event, Half, TransferR, TransferW , RxDma, TxDma, TransferPayload};
use crate::rcc::{AHB, Enable};

#[allow(clippy::manual_non_exhaustive)]
Expand Down Expand Up @@ -177,6 +177,22 @@ macro_rules! dma {
pub fn in_progress(&self) -> bool {
self.isr().$tcifX().bit_is_clear()
}

#[inline(always)]
pub(crate) fn wait_transfer(&mut self) {
while self.in_progress() {}

atomic::compiler_fence(Ordering::Acquire);

self.stop();

// we need a read here to make the Acquire fence effective
// we do *not* need this if `dma.stop` does a RMW operation
unsafe { ptr::read_volatile(&0); }

// we need a fence here for the same reason we need one in `Transfer.wait`
atomic::compiler_fence(Ordering::Acquire);
}
}

impl $CX {
Expand Down Expand Up @@ -295,7 +311,7 @@ macro_rules! dma {
}
}

impl<BUFFER, PAYLOAD, MODE> Transfer<MODE, BUFFER, RxDma<PAYLOAD, $CX>>
impl<BUFFER, PAYLOAD> TransferW<BUFFER, RxDma<PAYLOAD, $CX>>
where
RxDma<PAYLOAD, $CX>: TransferPayload,
{
Expand All @@ -304,19 +320,7 @@ macro_rules! dma {
}

pub fn wait(mut self) -> (BUFFER, RxDma<PAYLOAD, $CX>) {
while !self.is_done() {}

atomic::compiler_fence(Ordering::Acquire);

self.payload.stop();

// we need a read here to make the Acquire fence effective
// we do *not* need this if `dma.stop` does a RMW operation
unsafe { ptr::read_volatile(&0); }

// we need a fence here for the same reason we need one in `Transfer.wait`
atomic::compiler_fence(Ordering::Acquire);

self.payload.channel.wait_transfer();
// `Transfer` needs to have a `Drop` implementation, because we accept
// managed buffers that can free their memory on drop. Because of that
// we can't move out of the `Transfer`'s fields, so we use `ptr::read`
Expand All @@ -333,7 +337,7 @@ macro_rules! dma {
}
}

impl<BUFFER, PAYLOAD, MODE> Transfer<MODE, BUFFER, TxDma<PAYLOAD, $CX>>
impl<BUFFER, PAYLOAD> TransferR<BUFFER, TxDma<PAYLOAD, $CX>>
where
TxDma<PAYLOAD, $CX>: TransferPayload,
{
Expand All @@ -342,19 +346,7 @@ macro_rules! dma {
}

pub fn wait(mut self) -> (BUFFER, TxDma<PAYLOAD, $CX>) {
while !self.is_done() {}

atomic::compiler_fence(Ordering::Acquire);

self.payload.stop();

// we need a read here to make the Acquire fence effective
// we do *not* need this if `dma.stop` does a RMW operation
unsafe { ptr::read_volatile(&0); }

// we need a fence here for the same reason we need one in `Transfer.wait`
atomic::compiler_fence(Ordering::Acquire);

self.payload.channel.wait_transfer();
// `Transfer` needs to have a `Drop` implementation, because we accept
// managed buffers that can free their memory on drop. Because of that
// we can't move out of the `Transfer`'s fields, so we use `ptr::read`
Expand All @@ -371,7 +363,7 @@ macro_rules! dma {
}
}

impl<BUFFER, PAYLOAD> Transfer<W, BUFFER, RxDma<PAYLOAD, $CX>>
impl<BUFFER, PAYLOAD> TransferW<BUFFER, RxDma<PAYLOAD, $CX>>
where
RxDma<PAYLOAD, $CX>: TransferPayload,
{
Expand Down Expand Up @@ -521,7 +513,7 @@ where
B: StaticWriteBuffer<Word = RS>,
Self: core::marker::Sized + TransferPayload,
{
fn read(self, buffer: B) -> Transfer<W, B, Self>;
fn read(self, buffer: B) -> TransferW<B, Self>;
}

/// Trait for DMA writing from memory to peripheral.
Expand All @@ -530,5 +522,23 @@ where
B: StaticReadBuffer<Word = TS>,
Self: core::marker::Sized + TransferPayload,
{
fn write(self, buffer: B) -> Transfer<R, B, Self>;
fn write(self, buffer: B) -> TransferR<B, Self>;
}

/// Trait for DMA blocking readings from peripheral to memory. It starts DMA transfer and waits for complete.
pub trait BlockingReadDma<B, RS>: Receive
where
B: StaticWriteBuffer<Word = RS>,
Self: core::marker::Sized + TransferPayload,
{
fn blocking_read(&mut self, buffer: &mut B);
}

/// Trait for DMA blocking writing from memory to peripheral. It starts DMA transfer and waits for complete.
pub trait BlockingWriteDma<B, TS>: Transmit
where
B: StaticReadBuffer<Word = TS>,
Self: core::marker::Sized + TransferPayload,
{
fn blocking_write(&mut self, buffer: &B);
}
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