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Merge pull request #513 from stm32-rs/mpu9250
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reenable mpu9250
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burrbull authored Oct 11, 2024
2 parents 51321ac + 8541e29 commit ec32a32
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Showing 4 changed files with 22 additions and 35 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Changed

- Update `bxcan`, `heapless`, `mfrc522`, reenable `mpu9250` example [#513]
- PWM timer auto reload value is now preloaded/buffered [#453]
- Move from bors/manual merge to GH merge queue [#467]
- Replace UB code by a legitimate pointer access [#480]
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7 changes: 4 additions & 3 deletions Cargo.toml
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Expand Up @@ -22,7 +22,7 @@ cortex-m = "0.7.6"
cortex-m-rt = "0.7.1"
nb = "1.1"
embedded-dma = "0.2.0"
bxcan = "0.7"
bxcan = "0.8.0"
void = { default-features = false, version = "1.0.2" }
fugit = "0.3.7"
fugit-timer = "0.1.3"
Expand Down Expand Up @@ -59,8 +59,9 @@ panic-semihosting = "0.6.0"
panic-itm = "0.4.2"
cortex-m-rtic = "1.1.3"
cortex-m-semihosting = "0.5.0"
heapless = "0.7.16"
mfrc522 = "0.5.0"
heapless = "0.8.0"
mfrc522 = { version = "0.7.0", features = ["eh02"] }
mpu9250 = "0.25.0"
usb-device = "0.2.8"
usbd-serial = "0.1.1"

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5 changes: 3 additions & 2 deletions examples/mfrc522.rs
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Expand Up @@ -7,7 +7,7 @@ use panic_itm as _;
use cortex_m::iprintln;

use cortex_m_rt::entry;
use mfrc522::Mfrc522;
use mfrc522::{comm::eh02::spi::SpiInterface, Mfrc522};
use stm32f1xx_hal::{
pac,
prelude::*,
Expand Down Expand Up @@ -44,7 +44,8 @@ fn main() -> ! {
);

let nss = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);
let mut mfrc522 = Mfrc522::new(spi).with_nss(nss).init().unwrap();
let itf = SpiInterface::new(spi).with_nss(nss);
let mut mfrc522 = Mfrc522::new(itf).init().unwrap();

let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
led.set_high();
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44 changes: 14 additions & 30 deletions examples/mpu9250.rs.disabled → examples/mpu9250.rs
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Expand Up @@ -5,27 +5,22 @@
#![no_main]
#![no_std]

extern crate cortex_m;
extern crate cortex_m_rt as rt;
extern crate mpu9250;
extern crate panic_semihosting;
extern crate stm32f1xx_hal as hal;
use panic_halt as _;

use cortex_m::asm;
use hal::delay::Delay;
use hal::prelude::*;
use hal::spi::Spi;
use hal::stm32f103xx;
use cortex_m_rt::entry;
use mpu9250::Mpu9250;
use rt::{entry, exception, ExceptionFrame};
use stm32f1xx_hal as hal;

use hal::{pac, prelude::*, spi::Spi};

#[entry]
fn main() -> ! {
let cp = cortex_m::Peripherals::take().unwrap();
let dp = stm32f103xx::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();

let mut flash = dp.FLASH.constrain();
let mut rcc = dp.RCC.constrain();
let rcc = dp.RCC.constrain();

let clocks = rcc.cfgr.freeze(&mut flash.acr);

Expand All @@ -46,36 +41,25 @@ fn main() -> ! {
// let miso = gpiob.pb14;
// let mosi = gpiob.pb15.into_alternate_push_pull(&mut gpiob.crh);

let spi = Spi::spi1(
let spi = Spi::new(
dp.SPI1,
(sck, miso, mosi),
&mut afio.mapr,
mpu9250::MODE,
(sck, miso, mosi, &mut afio.mapr),
mpu9250::MODE.into(),
1.MHz(),
clocks,
&clocks,
);

let mut delay = Delay::new(cp.SYST, &clocks);
let mut delay = cp.SYST.delay(&clocks);

let mut mpu9250 = Mpu9250::marg(spi, nss, &mut delay).unwrap();
let mut mpu9250 = Mpu9250::marg_default(spi, nss, &mut delay).unwrap();

// sanity checks
assert_eq!(mpu9250.who_am_i().unwrap(), 0x71);
assert_eq!(mpu9250.ak8963_who_am_i().unwrap(), 0x48);

let _a = mpu9250.all().unwrap();
let _a = mpu9250.all::<[f32; 3]>().unwrap();

asm::bkpt();

loop {}
}

#[exception]
fn HardFault(ef: &ExceptionFrame) -> ! {
panic!("{:#?}", ef);
}

#[exception]
fn DefaultHandler(irqn: i16) {
panic!("Unhandled exception (IRQn = {})", irqn);
}

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