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rp2/mpconfigport: Enable MD5, SHA1 and cryptolib on all boards. Check spelling with codespell #63: Commit e6a7dc1 pushed by sfe-SparkFro
34s master
master
34s
rp2/hstx: Drain FIFO after soft reset. Check spelling with codespell #62: Commit 74ee1eb pushed by sfe-SparkFro
14s rp2_hstx
rp2_hstx
14s
rp2: Properly close DMA channels. Check spelling with codespell #61: Commit d5910c1 pushed by sfe-SparkFro
14s rp2_dma_deinit
rp2_dma_deinit
14s
docs/rp2: Add HSTX class documentation. Check spelling with codespell #60: Commit 4f2c806 pushed by sfe-SparkFro
18s rp2_hstx
rp2_hstx
18s
docs/rp2: Add HSTX class documentation. Check spelling with codespell #59: Commit b005b40 pushed by sfe-SparkFro
15s rp2_hstx
rp2_hstx
15s
docs/rp2: Add HSTX class documentation. Check spelling with codespell #58: Commit 5f34a97 pushed by sfe-SparkFro
14s rp2_hstx
rp2_hstx
14s
rp2: Add HSTX ALT function. Check spelling with codespell #57: Commit 7a554db pushed by sfe-SparkFro
14s rp2_pins_af0
rp2_pins_af0
14s
rp2: Add HSTX ALT function. Check spelling with codespell #56: Commit 60b20e9 pushed by sfe-SparkFro
14s rp2_pins_af0
rp2_pins_af0
14s
shared/runtime/pyexec: Set PYEXEC_FORCED_EXIT flag for SystemExit. Check spelling with codespell #55: Commit a686410 pushed by sfe-SparkFro
14s master
master
14s
rp2: Properly de-init all DMA channels during soft reboot. Check spelling with codespell #54: Commit 746d79d pushed by sfe-SparkFro
15s rp2_dma_deinit
rp2_dma_deinit
15s
docs/mimxrt/pinout: Use Dxx pin identifiers for Teensy boards. Check spelling with codespell #53: Commit c07fda7 pushed by sfe-SparkFro
12s master
master
12s
py/mkrules: Change LIB to LIBS. Check spelling with codespell #52: Commit dbaa315 pushed by sfe-SparkFro
14s fix_cpp_module_make
fix_cpp_module_make
14s
py: Add LIBS_USERMOD to LIBS. Check spelling with codespell #51: Commit 7176acb pushed by sfe-SparkFro
14s fix_cpp_module_make
fix_cpp_module_make
14s
py: Add LIBS_USERMOD to LIBS. Check spelling with codespell #50: Commit ea0c04f pushed by sfe-SparkFro
19s fix_cpp_module_make
fix_cpp_module_make
19s
mimxrt: Make linker scripts configurable. Check spelling with codespell #49: Commit c1a8c50 pushed by sfe-SparkFro
13s mimxrt_ld
mimxrt_ld
13s
stm32/machine_uart: Implement TX/RX inversion parameter for UART on H7. Check spelling with codespell #48: Commit 4efc5e1 pushed by sfe-SparkFro
15s master
master
15s
rp2: Add initial HSTX implementation. Check spelling with codespell #47: Commit c24e8ef pushed by sfe-SparkFro
22s rp2_hstx
rp2_hstx
22s
rp2: Add initial HSTX implementation. Check spelling with codespell #46: Commit a5d5d1f pushed by sfe-SparkFro
15s rp2_hstx
rp2_hstx
15s
lib/stm32lib: Update N6, U5 & WB. Check spelling with codespell #45: Commit 673524f pushed by sfe-SparkFro
18s master
master
18s
mimxrt/psram: Use lib functions in favor of direct register access. Check spelling with codespell #44: Commit df5b315 pushed by sfe-SparkFro
21s mimxrt_psram
mimxrt_psram
21s
mimxrt/psram: Improve PSRAM implementation. Check spelling with codespell #43: Commit 8f50a00 pushed by sfe-SparkFro
20s mimxrt_psram
mimxrt_psram
20s
mimxrt/psram: Improve PSRAM implementation. Check spelling with codespell #42: Commit 45ffa4a pushed by sfe-SparkFro
20s mimxrt_psram
mimxrt_psram
20s
mimxrt/Makefile: Add CXXFLAGS, and libstdc++ to LDFLAGS. Check spelling with codespell #41: Commit c353873 pushed by sfe-SparkFro
22s fix_mimxrt_external_modules
fix_mimxrt_external_modules
22s
esp32/boards: Apply additional IRAM savings. Check spelling with codespell #40: Commit 9999553 pushed by sfe-SparkFro
15s master
master
15s
mimxrt: Improve PSRAM implementation. Check spelling with codespell #39: Commit 12091d3 pushed by sfe-SparkFro
26s mimxrt_psram
mimxrt_psram
26s