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Adding support for FPGAPCIe in PDDF #13476

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merged 4 commits into from
Feb 6, 2023
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FuzailBrcm
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Why I did it

Some of the platform vendors use FPGA in the HW design. This FPGA is connected to the CPU via PCIe interface. This FPGA also works as an I2C controller having other devices attached to the I2C channels emanating from it. Adding a common module, a driver and a platform specific algorithm module to be used for such FPGA in PDDF.

How I did it

Added 'pddf_fpgapci_module', 'pddf_fpgapci_driver' and a sample algorithm module for Xilinx device 7021. Kernel modules which takes the platform dependent data from PDDF JSON files and initialises the PCIe FPGA. The sample algorithm module can be used by the ODMs in case the communication algorithms are same for their device. Else, they need to come up with similar algo module.

How to verify it

Any platform having such an FPGA and brought up using PDDF would use these kernel modules. The detail representation of such a device in PDDF JSON file is covered in the HLD.

Which release branch to backport (provide reason below if selected)

  • 201811
  • 201911
  • 202006
  • 202012
  • 202106
  • 202111
  • 202205
  • 202211

Description for the changelog

Ensure to add label/tag for the feature raised. example - PR#2174 under sonic-utilities repo. where, Generic Config and Update feature has been labelled as GCU.

Link to config_db schema for YANG module changes

A picture of a cute animal (not mandatory but encouraged)

@adyeung
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adyeung commented Jan 24, 2023

@jostar-yang pls help review

@FuzailBrcm
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@celestica-gl , @qnos

Please review.

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The code is fine.

@adyeung
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adyeung commented Feb 2, 2023

@prgeor pls help merge this PR

@FuzailBrcm
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/azpw run Azure.sonic-buildimage

@mssonicbld
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/AzurePipelines run Azure.sonic-buildimage

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Azure Pipelines successfully started running 1 pipeline(s).

@FuzailBrcm
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@prgeor pls help merge this PR

@lguohan lguohan merged commit 0704ff5 into sonic-net:master Feb 6, 2023
qnos pushed a commit to qnos/sonic-buildimage that referenced this pull request Nov 12, 2023
Why I did it
Some of the platform vendors use FPGA in the HW design. This FPGA is connected to the CPU via PCIe interface. This FPGA also works as an I2C controller having other devices attached to the I2C channels emanating from it. Adding a common module, a driver and a platform specific algorithm module to be used for such FPGA in PDDF.

How I did it
Added 'pddf_fpgapci_module', 'pddf_fpgapci_driver' and a sample algorithm module for Xilinx device 7021. Kernel modules which takes the platform dependent data from PDDF JSON files and initialises the PCIe FPGA. The sample algorithm module can be used by the ODMs in case the communication algorithms are same for their device. Else, they need to come up with similar algo module.

How to verify it
Any platform having such an FPGA and brought up using PDDF would use these kernel modules. The detail representation of such a device in PDDF JSON file is covered in the HLD.
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7 participants