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[Refactor] kernels: Centralize GPU architecture queries in sglang.kernels.arch - #47782
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…nels.arch Add sglang.kernels.arch.current_arch(), a cached per-process CudaArch / HipArch / DeviceArch object with lazy device attributes (num_sms, shared memory, L2, capability, is_sm / is_sm_at_least, supports_pdl), and move kernel arch queries onto it. Cache PlatformInfo.detect(). Rename the JIT compile target ArchInfo to CompileArch, make get_jit_cuda_arch an internal get_compile_arch, and drop override_jit_cuda_arch. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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ping @BBuf (or his/her agent) for review |
…gate test Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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/rerun-test test/registered/kernels/ops/gemm/test_cutedsl_dual_gemm.py |
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# Conflicts: # python/sglang/kernels/ops/moe/moe_fused_gate.py
BBuf
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LGTM. The earlier hardware-validation request remains open.
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/rerun-failed-ci |
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[BBuf Review Agent] @DarkSharpness these CI failures look related to this change, could you take a look?
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@BBuf this one is pre-existing on main, not from this change.
It has failed this way since 10-29. The open fix is #46947 (deterministic VAE convolutions on ROCm). The CUDA side of this PR is blocked by two other main-side failures in |
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[BBuf Review Agent] @DarkSharpness The test and VAE code match main, and the changed Flux3 PrimsTS path is still CUDA-only. I'll drop the AMD CI attribution. |
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/rerun-failed-ci |
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/rerun-failed-ci |
Main removed get_jit_cuda_arch (sgl-project#47782), so the SM10x checks of the W8A16 path (dsv3_fused_a_gemm_fp8_module, the cuda_sm10x test fixture, benchmark_fp8) now use current_arch().is_sm(10). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…nels.arch (sgl-project#47782) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Motivation
Kernels query GPU architecture in many ad-hoc ways:
torch.cuda.get_device_capability(...),get_device_properties(...).multi_processor_count,gcnArchNamestring checks,sglang.srt.utilshelpers, and the JIT compile targetget_jit_cuda_arch(), which several kernels also used for runtime decisions. These are duplicated, sometimes hard-code device 0, and makesglang.kernelsdepend onsglang.srt.This PR adds one self-contained entry point,
sglang.kernels.arch.current_arch(), and moves kernel arch queries onto it.Modifications
sglang.kernels.arch(torch only, no srt dependency):current_arch()returns a process-wide cached object chosen fromPlatformInfo.detect():CudaArchon NVIDIA,HipArchon AMD, a plainDeviceArchelsewhere. All GPUs in a node are assumed to be the same model, so there is no device argument. Attributes arecached_property, read lazily on first use.num_sms,warp_size,l2_cache_bytes,smem_per_block_optin,smem_per_sm,regs_per_sm,max_threads_per_sm,name,props,supports_pdl.is_sm(major, minor=None)/is_sm_at_least(major, minor=0): False off NVIDIA, so call sites need no platform guard..cuda/.hipnarrow to the platform object (None elsewhere).CudaArchaddsmajor,minor,capability,sm_version,max_vec_bytes,supports_cluster;HipArchaddsgcn_arch.PlatformInfo.detect()is now cached (_probe()is the uncached probe) and gainsis_hip/is_musa; the selector drops its ownlru_cache.ArchInfois renamed toCompileArch(a frozenmsgspec.Struct).get_jit_cuda_arch()becomes the internalget_compile_arch()used only by the build pipeline, andmake_jit_cuda_arch()becomesCompileArch.for_capability().override_jit_cuda_arch()is removed (its only user compiled for the local GPU anyway).is_arch_support_pdl()readscurrent_arch().supports_pdl, andis_hip_runtime()/is_musa_runtime()readPlatformInfo.sglang.kernels(plus a few kernel tests and benchmarks) now usecurrent_arch()instead of direct torch/srt queries. Several one-line local helpers (_num_sms,_get_num_sm,_mla_core_count, ...) are removed.Left unchanged on purpose: vendored code (
flash_attn/cute,fla, code ported from vLLM/aiter/FlashInfer/CUTLASS), import-time queries, srt predicates that also gate on the CUDA toolkit version (is_sm100_supported, ...), AMD family predicates (is_gfx95_supported, ...), and sites that rely on ROCm reporting gfx-derived capabilities. These can follow once the matching interfaces exist.Behavior notes:
deviceargument for an arch query now ignore it (same-model assumption). The parameters are kept to avoid touching callers.Accuracy Tests
No numerical change: the patch only changes how architecture facts are read.
Speed Tests and Profiling
N/A.
Checklist
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CI States
Latest PR Test (Base): ❌ Run #41361360932
Latest PR Test (Extra): ❌ Run #41361360833
Latest PR Test (AMD ROCm 10): ❌ Run #41361360820
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