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74f68e5
Port original PR1 optimizations for BF16-head MTP evaluation
BBuf Oct 1, 2026
6df0eb1
Optimize Nemotron MTP small-M MoE and enable hybrid prefill graphs
BBuf Oct 2, 2026
caabdfe
Format small-M MoE test imports
BBuf Oct 2, 2026
4bb8350
Apply repository-pinned Python formatting
BBuf Oct 2, 2026
d058dee
Limit Nemotron MTP optimization to serving shapes and dispatch on SM120
BBuf Oct 2, 2026
dd99be1
fix(nemotron): reuse hybrid prefill graph executables on SM120
BBuf Oct 3, 2026
ccb956f
perf(nemotron): reuse prefill overlap stream with graph events
BBuf Oct 3, 2026
28e1afc
perf(nemotron): reuse exact BF16 head packing and small-M routing on PR2
BBuf Oct 8, 2026
92ec053
style(nemotron): place reused head test under current JIT layout
BBuf Oct 8, 2026
147f228
perf(flashinfer): reuse resolved host lengths for draft planning
BBuf Oct 8, 2026
064b82d
perf(flashinfer): plan EAGLE verify from committed host lengths
BBuf Oct 8, 2026
af137c8
perf(moe): restore lossless BF16 experts through async staging
BBuf Oct 8, 2026
a6ae604
perf(head): reuse lossless BF16 storage for full M4 verification
BBuf Oct 8, 2026
ac2f3d0
Route M4 logits through the lossless head and assert real dispatch
BBuf Oct 8, 2026
a962807
Add lossless SM120 M4 input projection with exact BF16 split reduction
BBuf Oct 8, 2026
a2affc8
Restore original residual RMSNorm rounding for tiny batches
BBuf Oct 8, 2026
7bd090c
Specialize SM120 four-token Mamba verify shapes without changing stat…
BBuf Oct 8, 2026
afc8533
Optimize SM120 Mamba prefill tiles and draft host plan preparation
BBuf Oct 8, 2026
3dcaa8e
Enable topk-one static SSM and share small-M BF16 expert reads
BBuf Oct 8, 2026
6c0e4f3
Avoid NVFP4 weight reads for exact zero activation blocks
BBuf Oct 8, 2026
fe0a0fb
Use reversible pair-major NVFP4 weights for serial verify
BBuf Oct 8, 2026
468155e
Allocate NVFP4 layout workspace during graph warmup
BBuf Oct 8, 2026
c851fee
Reject weight export while reversible NVFP4 layout is enabled
BBuf Oct 8, 2026
9470bb7
style(nemotron): apply repository formatting to SM120 optimizations
BBuf Oct 8, 2026
6231c7d
refactor(sm120): remove marginal Nemotron paths and consolidate retai…
BBuf Oct 9, 2026
59e4ae2
fix(nemotron): adapt SM120 serving optimizations to current dev
BBuf Oct 15, 2026
f6b0d4d
Fix zero request slots when max_running_requests < attn dp size
elvischenv Aug 13, 2026
4bf6c5a
Fix hybrid-SSM DP rank crash when a peer prefills while it decodes
elvischenv Aug 13, 2026
ddda8fa
Test the per-worker request split below the attention DP size
elvischenv Oct 2, 2026
a076508
Test the DP decode relabel through the mamba metadata builder
elvischenv Oct 2, 2026
2c9fc6d
Use a separate workspace for fmha_v2 prefill in trtllm_mha
elvischenv Oct 6, 2026
18803de
Assert fmha_v2 leaves XQA's first semaphore zero in the regression test
elvischenv Oct 13, 2026
ab6e828
[Nemotron-H] Support EPLB
elvischenv Oct 11, 2026
1bc9bfa
[Nemotron-H] EPLB: fix MTP recording, runner selection, Puzzle expert…
elvischenv Oct 13, 2026
44d123c
[Nemotron-H] Shut down test servers gracefully in Nemotron-3-Super NV…
elvischenv Oct 14, 2026
a92aa29
[Nemotron-H] EPLB: pick routed runner for all quantizations, test rem…
elvischenv Oct 14, 2026
6890a93
Merge pull request #2 from radixark/bbuf/nemotron-mtp-small-m-prefill…
Jiminator Oct 15, 2026
2c7511f
Merge pull request #4 from radixark/jimmy/stack-nemotron-upstream-345…
Jiminator Oct 15, 2026
fa034ba
Merge upstream main into Nemotron Super dev branch
Oct 15, 2026
f500db5
refactor: isolate Nemotron SM120 serving optimizations
BBuf Oct 16, 2026
af26284
test: compare SM120 SSD tiles against upstream execution
BBuf Oct 16, 2026
b416cd5
refactor: narrow Nemotron serving optimizations to the MTP path
BBuf Oct 17, 2026
ce427d4
refactor: keep the MTP router in the existing fused gate operator
BBuf Oct 17, 2026
d3f59dd
Merge main into Nemotron serving PR
BBuf Oct 17, 2026
17c8591
Drop the carried #34535 DP fixes from the Nemotron PR
Oct 18, 2026
68da972
Drop the carried #42746 trtllm_mha regression test
Oct 18, 2026
4631e82
Drop the MoE forward_batch helper superseded by #43685
Oct 18, 2026
39ac92d
Merge main into Nemotron serving PR
BBuf Oct 19, 2026
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21 changes: 13 additions & 8 deletions python/sglang/kernels/jit/csrc/gemm/hopper_bf16_gemv.cuh
Original file line number Diff line number Diff line change
Expand Up @@ -37,12 +37,14 @@ __device__ __forceinline__ float dot8_f32(const float4 wv, const float4 xv) {
return acc;
}

template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps>
template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps, bool kUsePDL>
__global__ void __launch_bounds__(kNumWarps * 32)
hopper_bf16_gemv_kernel(bf16_t* __restrict__ out, const bf16_t* __restrict__ x, const bf16_t* __restrict__ w) {
__shared__ bf16_t sx[K];

PDLTriggerSecondary<kUsePDL>();
const uint32_t tid = threadIdx.x;
PDLWaitPrimary<kUsePDL>();
for (uint32_t i = tid * kGemvVecSize; i < K; i += kNumWarps * 32 * kGemvVecSize) {
*reinterpret_cast<float4*>(sx + i) = *reinterpret_cast<const float4*>(x + i);
}
Expand Down Expand Up @@ -118,9 +120,11 @@ __global__ void __launch_bounds__(kNumWarps * 32)
}
}

template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps>
template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps, bool kUsePDL>
struct HopperBf16GemvKernel {
static_assert(K % (32 * kGemvVecSize * kUnroll) == 0, "K must cover full unrolled warp strides");
static_assert(
kUnroll == 1 ? (K % kGemvVecSize == 0) : (K % (32 * kGemvVecSize * kUnroll) == 0),
"K must be 16B-aligned (kUnroll==1) or cover full unrolled warp strides");
static_assert(K * sizeof(bf16_t) <= 48 * 1024, "activation row must fit static shared memory");

static void run(const tvm::ffi::TensorView x, const tvm::ffi::TensorView w, const tvm::ffi::TensorView out) {
Expand All @@ -134,11 +138,12 @@ struct HopperBf16GemvKernel {

constexpr uint32_t kRowsPerBlock = kRows * kNumWarps;
constexpr uint32_t kNumBlocks = (N + kRowsPerBlock - 1) / kRowsPerBlock;
LaunchKernel(kNumBlocks, kNumWarps * 32, device.unwrap())(
hopper_bf16_gemv_kernel<N, K, kRows, kUnroll, kNumWarps>,
static_cast<bf16_t*>(out.data_ptr()),
static_cast<const bf16_t*>(x.data_ptr()),
static_cast<const bf16_t*>(w.data_ptr()));
LaunchKernel(kNumBlocks, kNumWarps * 32, device.unwrap())
.enable_pdl(kUsePDL)(
hopper_bf16_gemv_kernel<N, K, kRows, kUnroll, kNumWarps, kUsePDL>,
static_cast<bf16_t*>(out.data_ptr()),
static_cast<const bf16_t*>(x.data_ptr()),
static_cast<const bf16_t*>(w.data_ptr()));
}
};

Expand Down
23 changes: 14 additions & 9 deletions python/sglang/kernels/jit/csrc/gemm/sm120_fp8_gemv.cuh
Original file line number Diff line number Diff line change
Expand Up @@ -39,15 +39,17 @@ __device__ __forceinline__ float dot16_fp8_f32(const float4 wv, const float4 xv)
return acc;
}

template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps>
template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps, bool kUsePDL>
__global__ void __launch_bounds__(kNumWarps * 32) sm120_fp8_gemv_kernel(
bf16_t* __restrict__ out,
const uint8_t* __restrict__ x,
const uint8_t* __restrict__ w,
const float* __restrict__ alpha) {
__shared__ uint8_t sx[K];

PDLTriggerSecondary<kUsePDL>();
const uint32_t tid = threadIdx.x;
PDLWaitPrimary<kUsePDL>();
for (uint32_t i = tid * kFp8VecSize; i < K; i += kNumWarps * 32 * kFp8VecSize) {
*reinterpret_cast<float4*>(sx + i) = *reinterpret_cast<const float4*>(x + i);
}
Expand Down Expand Up @@ -123,9 +125,11 @@ __global__ void __launch_bounds__(kNumWarps * 32) sm120_fp8_gemv_kernel(
}
}

template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps>
template <uint32_t N, uint32_t K, uint32_t kRows, uint32_t kUnroll, uint32_t kNumWarps, bool kUsePDL>
struct Sm120Fp8GemvKernel {
static_assert(K % (32 * kFp8VecSize * kUnroll) == 0, "K must cover full unrolled warp strides");
static_assert(
kUnroll == 1 ? (K % kFp8VecSize == 0) : (K % (32 * kFp8VecSize * kUnroll) == 0),
"K must be 16B-aligned (kUnroll==1) or cover full unrolled warp strides");
static_assert(K <= 48 * 1024, "activation row must fit static shared memory");

static void
Expand All @@ -144,12 +148,13 @@ struct Sm120Fp8GemvKernel {

constexpr uint32_t kRowsPerBlock = kRows * kNumWarps;
constexpr uint32_t kNumBlocks = (N + kRowsPerBlock - 1) / kRowsPerBlock;
LaunchKernel(kNumBlocks, kNumWarps * 32, device.unwrap())(
sm120_fp8_gemv_kernel<N, K, kRows, kUnroll, kNumWarps>,
static_cast<bf16_t*>(out.data_ptr()),
static_cast<const uint8_t*>(x.data_ptr()),
static_cast<const uint8_t*>(w.data_ptr()),
static_cast<const float*>(alpha.data_ptr()));
LaunchKernel(kNumBlocks, kNumWarps * 32, device.unwrap())
.enable_pdl(kUsePDL)(
sm120_fp8_gemv_kernel<N, K, kRows, kUnroll, kNumWarps, kUsePDL>,
static_cast<bf16_t*>(out.data_ptr()),
static_cast<const uint8_t*>(x.data_ptr()),
static_cast<const uint8_t*>(w.data_ptr()),
static_cast<const float*>(alpha.data_ptr()));
}
};

Expand Down
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