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[AMD][V4.1][*/N] Switch the fp8 dense GEMMs on gfx950 to aiter's MXFP8 GEMM - #41970
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Depends on ROCm/aiter#5750, which adds a native MXFP8 GEMM (e4m3 with e8m0 scales per 32 along K, 32x32-block weight scales) behind aiter.gemm_a8w8_blockscale. With --fp8-gemm-backend aiter, the DSv4.1 fp8 dense linears on gfx950 run on that kernel instead of the sglang native MXFP8 route (mxfp8_gemv / dot_scaled / hipBLASLt bf16).
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October 1, 2026 02:06
On the aiter route the stacked wkv weights fell through to the Triton block fp8 GEMM, whose ue8m0 activation quant is CUDA-only. Stack the ue8m0 block scales too and run the stacked GEMM through aiter.
HaiShaw
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Oct 1, 2026
This was referenced Oct 2, 2026
This was referenced Oct 5, 2026
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Motivation
On gfx950, the DeepSeek-V4.1 fp8 dense linears (32x32-block weights with ue8m0 scales) run on sglang's native MXFP8 route.
ROCm/aiter#5750 adds a native MXFP8 GEMM to aiter (e4m3 with e8m0 scales per 32 along K, 32x32-block weight scales), reached through
aiter.gemm_a8w8_blockscale. This PR adds it as an opt-in route: with--fp8-gemm-backend aiter, the V4.1 fp8 dense linears on gfx950 run on aiter's kernel.Modifications
Add aiter's MXFP8 GEMM as a gfx950 backend for the DeepSeek-V4.1 fp8 dense linears, plus tests.
--fp8-gemm-backend aiterTestMxfp8AiterRouteGfx95intest_mxfp8_amd_gfx95.py.Accuracy Tests
gsm8k 1319: 0.909
Speed Tests and Profiling
kernel level test
With DSpark (block size 5), decode M is 6 x concurrency.
e2e test
8k1k
Checklist
Review and Merge Process
/tag-and-rerun-ci,/tag-run-ci-label,/rerun-failed-ciCI States
Latest PR Test (Base): ❌ Run #36810199110
Latest PR Test (Extra): ❌ Run #36810198773
Latest PR Test (AMD ROCm 10): ❌ Run #36810198918